AD9388ABSTZ-A5(RevF) データシートの表示（PDF） - Analog Devices

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AD9388ABSTZ-A5
(Rev.:RevF)

Dual HDMI Receiver, Multiformat HDTV Video Decoder, And RGB Graphics Digitizer

Analog Devices 

AD9388A

Timing Diagrams

t3

xDA

t5

t3

t6

t1

xCL

t2

t7

t4

t8

NOTES

1. THE PREFIX x REFERS TO PIN NAMES BEGINNING WITH S, DDCA_S, AND DDCB_S.

Figure 2. I2C Timing

t9

t10

LLC

P0 TO P29, VS,

HS, DE/FIELD

t11

t12

Figure 3. Pixel Port and Control CP Output Timing (CP Core)

SCLK

LRCLK

I2Sx

LEFT-JUSTIFIED

MODE

I2Sx

I2S MODE

I2Sx

RIGHT-JUSTIFIED

MODE

t13

t14

t15

t16

t17

MSB

MSB – 1

t18

t17

MSB

MSB – 1

t18

MSB

NOTES

1. THE SUFFIX x REFERS TO PIN NAMES ENDING WITH 0, 1, 2, AND 3.

Figure 4. I2S Timing

t17

t18

LSB

Rev. F | Page 8 of 24

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