AD9389A データシートの表示（PDF） - Analog Devices

部品番号

コンポーネント説明

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AD9389A

High Performance HDMI/DVI Transmitter

Analog Devices 

AD9389A

Pin No.

1, 48, 49

15, 16, 17

64, Paddle on

Bottom Side

36

35

34

33

Mnemonic

DVDD

PVDD

GND

SDA

SCL

DDCSDA

DDCSCL

Type 1

P

P

P

C2

C2

C2

C2

Description

1.8 V Power Supply for Digital and I/O Power Supply. These pins supply power to the digital logic

and I/Os. They should be filtered and as quiet as possible.

1.8 V PLL Power Supply. The most sensitive portion of the AD9389A is the clock generation

circuitry. These pins provide power to the clock PLL. The designer should provide quiet, noise-free

power to these pins.

Ground. The ground return for all circuitry on-chip. It is recommended that the AD9389A be

assembled on a single, solid ground plane with careful attention given to ground current paths.

Serial Port Data I/O. This pin serves as the serial port data I/O slave for register access. Supports

CMOS logic levels from 1.8 V to 3.3 V.

Serial Port Data Clock. This pin serves as the serial port data clock slave for register access.

Supports CMOS logic levels from 1.8 V to 3.3 V.

Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. 5 V CMOS logic level.

Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus. 5 V CMOS

logic level.

1 I = input, O = output, P = power supply, C = control.

2 For a full description of the 2-wire serial interface and its functionality, obtain documentation by contacting NDA from flatpanel_apps@analog.com.

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