AD9410 データシートの表示（PDF） - Analog Devices

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AD9410

10-Bit, 210 MSPS A/D Converter

Analog Devices 

AD9410

Pin No.

1, 2, 8, 9, 12, 13, 16, 17, 20, 21, 24,

27, 28, 29, 30, 71, 72, 73, 74, 77, 78

3, 7, 14, 15

4

5

6

10

11

18

19

22

23

25, 26, 31, 32, 69, 70, 75, 76

33, 40, 49, 52, 59, 68

34, 41, 48, 53, 60, 67

35–39

42–46

47

50

51

54–58

61–65

66

79

80

PIN FUNCTION DESCRIPTIONS

Mnemonic

Function

AGND

Analog Ground.

VCC

REFOUT

REFIN

DNC

AIN

AIN

ENCODE

ENCODE

DS

DS

VD

DGND

VDD

DB0–DB4

DB5–DB9

ORB

DCO

DCO

DA0–DA4

DA5–DA9

ORA

DFS

I/P

5 V Supply. (Regulate to within ± 5%.)

Internal Reference Output.

Internal Reference Input.

Do Not Connect.

Analog Input—True.

Analog Input—Complement.

Clock Input—True.

Clock Input—Complement.

Data Sync (Input)—True. Tie LOW if not used.

Data Sync (Input)—Complement. Float and decouple with 0.1 µF

capacitor if not used.

3.3 V Analog Supply. (Regulate to within ± 5%.)

Digital Ground.

3.3 V Digital Output Supply. (2.5 V to 3.6 V)

Digital Data Output for Channel B. (LSB = DB0.)

Digital Data Output for Channel B. (MSB = DB9.)

Data Overrange for Channel B.

Clock Output—Complement.

Clock Output—True.

Digital Data Output for Channel A. (LSB = DA0.)

Digital Data Output for Channel A. (MSB = DA9.)

Data Overrange for Channel A.

Data Format Select. HIGH = Two’s Complement, LOW = Binary.

Interleaved or Parallel Output Mode. Low = Parallel Mode, High =

Interleaved Mode. If tying high, use a current limiting series resistor

(2.5 kΩ) to the 5 V supply.

–6–

REV. 0

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