AD9547/PCBZ データシートの表示（PDF） - Analog Devices

部品番号

コンポーネント説明

メーカー

AD9547/PCBZ

Dual/Quad Input Network Clock Generator/Synchronizer

Analog Devices 

AD9547

Data Sheet

REFERENCE SWITCHOVER SPECIFICATIONS

Table 10.

Parameter

Min

Typ

MAXIMUM OUTPUT PHASE

40

PERTURBATION (PHASE BUILD-OUT

SWITCHOVER)

MAXIMUM TIME/TIME SLOPE

315

(HITLESS SWITCHOVER)

TIME REQUIRED TO SWITCH TO A NEW

REFERENCE

Hitless Switchover

5

Phase Build-Out Switchover

3

Max

200

65,535

Unit Test Conditions/Comments

ps

Assumes a jitter-free reference; satisfies

Telcordia GR-1244-CORE requirements

ns/sec

Minimum/maximum values are program-

mable upper bounds; a minimum value

ensures <10% error; satisfies Telcordia

GR-1244-CORE requirements

NPDP

NPDP

NPDP = nominal phase detector period

(NPDP = fREF/R)1

NPDP = nominal phase detector period

(NPDP = fREF/R)1

1 fREF is the frequency of the active reference; R is the frequency division factor determined by the R divider.

DISTRIBUTION CLOCK OUTPUTS (OUT0, OUT1)

Table 11.

Parameter

LVPECL MODE

Min

Typ

Max

Unit

Maximum Output Frequency

725

MHz

Rise/Fall Time1 (20% to 80%)

180

315

ps

Duty Cycle

45

55

%

Differential Output Voltage Swing 630

770

910

mV

Common-Mode Output Voltage

LVDS MODE

AVDD3 − 1.5 AVDD3 − 1.3 AVDD3 − 1.05 V

Maximum Output Frequency

725

MHz

Rise/Fall Time1 (20% to 80%)

200

350

ps

Duty Cycle

40

60

%

Differential Output Voltage Swing

Balanced (VOD)

247

454

mV

Unbalanced (ΔVOD)

50

mV

Offset Voltage

Common Mode (VOS)

Common-Mode Difference (ΔVOS)

1.125

Short-Circuit Output Current

13

CMOS MODE

1.375

V

50

mV

24

mA

Maximum Output Frequency

3.3 V Supply

Strong Drive Strength Setting

250

MHz

Weak Drive Strength Setting

25

MHz

1.8 V Supply

150

MHz

Test Conditions/Comments

Using internal current setting resistor

(nominal 3.12 kΩ)

100 Ω termination across output pins

Magnitude of voltage across pins; output

driver static

Output driver static

Using internal current setting resistor

(nominal 3.12 kΩ)

100 Ω termination across the output pins

Voltage swing between output pins;

output driver static

Absolute difference between voltage

swing of normal pin and inverted pin;

output driver static

Output driver static

Voltage difference between pins; output

driver static

Output driver static

Weak drive option not supported for

operating the CMOS drivers using a 1.8 V

supply

10 pF load

Rev. G | Page 8 of 106

Share Link: