AD9920A データシートの表示（PDF） - Analog Devices
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AD9920A Datasheet PDF : 112 Pages
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AD9920A
DIGITAL SPECIFICATIONS
IOVDD = 1.6 V to 3.6 V, RGVDD = HVDD1 and HVDD2 = 2.7 V to 3.6 V, CL = 20 pF, TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
LOGIC INPUTS (IOVDD)
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
LOGIC OUTPUTS (IOVDD, DRVDD)
High Level Output Voltage
Low Level Output Voltage
RG and H-DRIVER OUTPUTS (HVDD1,
HVDD2, and RGVDD)
High Level Output Voltage
Low Level Output Voltage
Maximum H1 to H8 Output Current
Maximum HL and RG Output Current
Maximum Load Capacitance
CLI INPUT
High Level Input Voltage
Low Level Input Voltage
Symbol
VIH
VIL
IIH
IIL
CIN
VOH
VOL
VOH
VOL
VIHCLI
VILCLI
Test Conditions/Comments Min
Typ
VDD − 0.6
10
10
10
IOH = 2 mA
IOL = 2 mA
VDD − 0.5
Maximum current
Maximum current
Programmable
Programmable
Each output
With CLO oscillator disabled
VDD − 0.5
30
17
60
CLIVDD/2 + 0.5
Max
Unit
V
0.6
V
μA
μA
pF
V
0.5
V
V
0.5
V
mA
mA
pF
V
CLIVDD/2 − 0.5 V
ANALOG SPECIFICATIONS
AVDD = 1.8 V, fCLI = 40.5 MHz, typical timing specifications, TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
CDS1
DC Restore
Allowable CCD Reset Transient
CDS Gain Accuracy
−3 dB CDS Gain
0 dB CDS Gain
+3 dB CDS Gain
+6 dB CDS Gain
Maximum Input Range Before
Saturation
−3 dB CDS Gain
0 dB CDS Gain
+3 dB CDS Gain
+6 dB CDS Gain
Allowable OB Pixel Amplitude1
0 dB CDS Gain (Default)
+6 dB CDS Gain
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
Gain Monotonicity
Gain Range
Low Gain
Maximum Gain
Test Conditions/Comments
Min
AVDD − 0.5 V
1.21
Limit is the lower of AVDD + 0.3 V or 2.2 V
VGA gain = 6.3 dB (Code 15, default value)
−3.1
−0.6
2.7
5.2
VGA Code 15, default
VGA Code 1023
−100
−50
Typ
Max
1.3
1.44
0.5
0.8
−2.6
−2.1
−0.1
+0.4
3.2
3.7
5.7
6.2
1.4
1.0
0.7
0.5
+200
+100
1024
Guaranteed
6.3
42.4
Rev. B | Page 5 of 112
Unit
V
V
dB
dB
dB
dB
V p-p
V p-p
V p-p
V p-p
mV
mV
Steps
dB
dB
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