AD9920ABBCZ データシートの表示（PDF） - Analog Devices
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AD9920ABBCZ Datasheet PDF : 112 Pages
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AD9920A
VERTICAL DRIVER SPECIFICATIONS
VH1, VH2 = 12 V; VM1, VM2, VMM = 0 V; VL1, VL2, VLL = −6 V; CL shown in load model; TA = 25°C.
Table 5.
Parameter
Symbol Test Conditions/Comments
Min
Typ
V1A TO V13
Simplified load conditions, 3000 pF to
ground + 30 Ω in series, SRSW = VSS
Delay Time, VL to VM and VM to VH tPLM, tPMH
40
Delay Time, VM to VL and VH to VM tPML, tPHM
40
Rise Time, VL to VM
tRLM
150
Rise Time, VM to VH
tRMH
315
Fall Time, VM to VL
tFML
250
Fall Time, VH to VM
tFHM
165
Output Currents
At −7.25 V
10
At −0.25 V
−22
At +0.25 V
22
At +14.75 V
−10
RON
V14, V15, V16
Simplified load conditions, 3000 pF to
ground + 30 Ω in series
Delay Time, VL to VM
tPLM
45
Delay Time, VM to VL
tPML
45
Rise Time, VL to VM
tRLM
345
Fall Time, VM to VL
tFML
280
Output Currents
At −7.25 V
10
At −0.25 V
−7
RON
SUBCK OUTPUT
Simplified load conditions, 1000 pF to ground
Delay Time, VLL to VH
tPLH
50
Delay Time, VH to VLL
tPHL
50
Delay Time, VLL to VMM
tPLM
50
Delay Time, VMM to VH
tPMH
50
Delay Time, VH to VMM
tPHM
50
Delay Time, VMM to VLL
tPML
50
Rise Time, VLL to VH
tRLH
50
Rise Time, VLL to VMM
tRLM
55
Rise Time, VMM to VH
tRMH
50
Fall Time, VH to VLL
tFHL
55
Fall Time, VH to VMM
tFHM
100
Fall Time, VMM to VLL
tFML
40
Output Currents
At −7.25 V
20
At −0.25 V
−12
At +0.25 V
12
At +14.75 V
−20
RON
SRCTL INPUT RANGE
Valid only when SRSW is high
0.8
Max
Unit
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
35
Ω
ns
ns
ns
ns
mA
mA
55
Ω
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
35
Ω
VDVDD V
Rev. B | Page 8 of 112
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