AD9923ABBCZ(Rev0) データシートの表示（PDF） - Analog Devices

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AD9923ABBCZ
(Rev.:Rev0)

CCD Signal Processor with V-Driver and Precision Timing™ Generator

Analog Devices 

VD

0 12

HD

CLPOB

NO CLPOB SIGNAL

FOR LINES 6 TO 8

NO CLPOB SIGNAL

FOR LINE 600

597 598

CLPMASKSTART1 = 6

CLPMASKEND1 = 8

CLPMASKSTART2 = CLPMASKEND2 = 600

Figure 24. CLPOB Masking Example

VD

0 12

HD

PBLK

NO PBLK SIGNAL

FOR LINES 6 TO 8

NO PBLK SIGNAL

FOR LINE 703

700 701

PBLKMASKSTART1 = 6 PBLKMASKEND1 = 8 PBLKMASKSTART2 = PBLKMASKEND2 = 703

Figure 25. PBLK Masking Example

AD9923A

Rev. 0 | Page 19 of 88

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