AD9923ABBCZ(Rev0) データシートの表示（PDF） - Analog Devices

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AD9923ABBCZ
(Rev.:Rev0)

CCD Signal Processor with V-Driver and Precision Timing™ Generator

Analog Devices 

AD9923A

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Specifications..................................................................................... 3

Digital Specifications ................................................................... 4

H-Driver Specifications ............................................................... 4

Vertical Driver Specifications ..................................................... 4

Analog Specifications................................................................... 5

Timing Specifications .................................................................. 6

Absolute Maximum Ratings............................................................ 7

Package Thermal Characteristics ............................................... 7

ESD Caution.................................................................................. 7

Pin Configuration and Function Descriptions............................. 8

Typical Performance Characteristics ........................................... 10

Equivalent Circuits ......................................................................... 11

Terminology .................................................................................... 12

Theory of Operation ...................................................................... 13

REVISION HISTORY

10/06—Revision 0: Initial Version

Precision Timing High Speed Timing Generation ................. 14

Horizontal Clamping and Blanking......................................... 18

Vertical Timing Generation...................................................... 25

Vertical Timing Example........................................................... 39

Vertical Driver Signal Configuration........................................... 41

Shutter Timing Control ............................................................. 45

SUBCK: Normal Operation...................................................... 46

Example of Exposure and Readout of Interlaced Frame....... 53

FG_TRIG Operation.................................................................. 55

Analog Front End Description/Operation ............................. 56

Standby Mode Operation .......................................................... 61

Circuit Layout Information....................................................... 63

Serial Interface Timing .............................................................. 66

Layout of Internal Registers ...................................................... 67

Updating New Register Values ................................................. 68

Complete Register Listing ......................................................... 69

Outline Dimensions ....................................................................... 85

Ordering Guide .......................................................................... 85

Rev. 0 | Page 2 of 88

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