AD9942 データシートの表示（PDF） - Analog Devices

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AD9942

Dual-Channel, 14-Bit CCD Signal Processor with Precision Timing™ Core

Analog Devices 

AD9942

ANALOG SPECIFICATIONS

TMIN to TMAX, AVDD_X = DVDD_X = 3.0 V, fCLI = 40 MHz, typical timing specifications, unless otherwise noted. X = A, B.

Table 3.

Parameter

Min

CDS

Gain

Allowable CCD Reset Transient1

Max Input Range Before Saturation

1.0

Max CCD Black Pixel Amplitude

VARIABLE GAIN AMPLIFIER (VGA_X)

Max Input Range

1.0

Max Output Range

2.0

Gain Control Resolution

Gain Monotonicity

Gain Range

Min Gain (Code 0)

Max Gain (Code 511)

CLPOB

Clamp Level Resolution

Clamp Level

Min Clamp Level

Max Clamp Level

CHN_A AND CHN_B ADC

Differential Nonlinearity (DNL)

−1.0

No Missing Codes

Full-Scale Input Voltage

VOLTAGE REFERENCE

Reference Top Voltage (REFT_X)

Reference Bottom Voltage (REFB_X)

SYSTEM PERFORMANCE

VGA Gain Accuracy

Min Gain (Code 0)

−0.5

Max Gain (Code 511)

17.5

Peak Nonlinearity, 500 mV Input Signal

Total Output Noise

Power Supply Rejection (PSR)

Typ

Max Unit

Notes

0

500

±100

dB

mV

V p-p

mV

Measured at 12 dB VGA gain

(Typ = 70 mV at 15 dB and 50 mV at 18 dB)

512

Guaranteed

V p-p

V p-p

Steps

0

dB

18

dB

256

0

1023

Steps

LSB

LSB

4 LSB/step

Measured at ADC output

± 0.5

+1.0 LSB

Guaranteed

2.0

V

2.0

V

1.0

V

Specifications include entire signal chain

0

+0.5 dB

18

18.5 dB

0.15

%

12 dB gain applied

3

LSB rms AC grounded input, 6 dB gain applied

50

dB

Measured with step change on supply

1 Input signal characteristics defined as follows:

500mV TYP

RESET TRANSIENT

100mV MAX

OPTICAL BLACK PIXEL

1V MAX

INPUT SIGNAL RANGE

Rev. A | Page 5 of 36

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