AD9991KCP データシートの表示（PDF） - Analog Devices
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AD9991KCP Datasheet PDF : 60 Pages
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AD9991–SPECIFICATIONS
Parameter
TEMPERATURE RANGE
Operating
Storage
POWER SUPPLY VOLTAGE
AVDD (AFE Analog Supply)
TCVDD (Timing Core Analog Supply)
RGVDD (RG Driver)
HVDD (H1–H4 Drivers)
DRVDD (Data Output Drivers)
DVDD (Digital)
POWER DISSIPATION (See TPC 1 for Power Curves)
27 MHz, Typ Supply Levels, 100 pF H1–H4 Loading
Power from HVDD Only*
Standby 1 Mode
Standby 2 Mode
Standby 3 Mode
MAXIMUM CLOCK RATE (CLI)
Min
Typ
–20
–65
2.7
3.0
2.7
3.0
2.7
3.0
2.7
3.0
2.7
3.0
2.7
3.0
270
100
105
10
0.5
27
*The total power dissipated by the HVDD supply may be approximated using the equation
Total HVDD Power = [CLOAD ϫ HVDD ϫ Pixel Frequency] ϫ HVDD ϫ Number of H-outputs used
Reducing the H-loading, using only two of the outputs, and/or using a lower HVDD supply will reduce the power dissipation.
Specifications subject to change without notice.
Max
+85
+150
3.6
3.6
3.6
3.6
3.6
3.6
Unit
°C
°C
V
V
V
V
V
V
mW
mW
mW
mW
mW
MHz
DIGITAL SPECIFICATIONS (RGVDD = HVDD = DVDD = DRVDD = 2.7 V to 3.6 V, CL = 20 pF, TMIN to TMAX, unless otherwise noted.)
Parameter
LOGIC INPUTS
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
LOGIC OUTPUTS (Except H and RG)
High Level Output Voltage @ IOH = 2 mA
Low Level Output Voltage @ IOL = 2 mA
RG and H-DRIVER OUTPUTS (H1–H4)
High Level Output Voltage @ Max Current
Low Level Output Voltage @ Max Current
Maximum Output Current (Programmable)
Maximum Load Capacitance (For Each Output)
Symbol
VIH
VIL
IIH
IIL
CIN
VOH
VOL
VOH
VOL
Min
Typ
2.1
10
10
10
2.2
VDD – 0.5
30
100
Max
Unit
V
0.6
V
µA
µA
pF
V
0.5
V
V
0.5
V
mA
pF
Specifications subject to change without notice.
REV. 0
–3–
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