AD9992 データシートの表示（PDF） - Analog Devices

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AD9992

12-Bit CCD Signal Processor with Precision Timing Generator

Analog Devices 

AD9992

DIGITAL SPECIFICATIONS

IOVDD = 1.6 V to 3.6 V, RGVDD = HVDD = 2.7 V to 3.6 V, CL = 20 pF, TMIN to TMAX, unless otherwise noted.

Table 2.

Parameter

LOGIC INPUTS (IOVDD)

High Level Input Voltage

Low Level Input Voltage

High Level Input Current

Low Level Input Current

Input Capacitance

LOGIC OUTPUTS (IOVDD, XVDD)

High Level Output Voltage @ IOH = 2 mA

Low Level Output Voltage @ IOL = 2 mA

RG and H-DRIVER OUTPUTS (HVDD, RGVDD)

High Level Output Voltage @ Maximum Current

Low Level Output Voltage @ Maximum Current

Maximum Output Current (Programmable)

Maximum Load Capacitance (for Each Output)

Symbol Min

Typ

VIH

VDD − 0.6

VIL

IIH

10

IIL

10

CIN

10

VOH

VDD − 0.5

VOL

VOH

VDD − 0.5

VOL

18

60

Max

0.6

0.5

0.5

800mV

MAXIMUM

500mV TYP

RESET TRANSIENT

200mV MAX

OPTICAL BLACK PIXEL

MAXIMUM INPUT LIMIT = LESSER OF

2.2V or AVDD + 0.2V

+1.8V TYP (AVDD)

+1.3V TYP (AVDD – 0.5V)

DC RESTORE VOLTAGE

1V MAXIMUM INPUT SIGNAL RANGE

(0dB CDS GAIN)

0V (AVSS)

MINIMUM INPUT LIMIT

(AVSS – 0.2V)

Figure 2. Input Signal Characteristics

(See Allowable OB Pixel Amplitude in Table 3)

Unit

V

V

μA

μA

pF

V

V

V

V

mA

pF

Rev. C | Page 4 of 92

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