AD9992 データシートの表示（PDF） - Analog Devices
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AD9992 Datasheet PDF : 92 Pages
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AD9992
ANALOG SPECIFICATIONS
AVDD = 1.8 V, fCLI = 40 MHz, typical timing specifications, TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
CDS
Allowable CCD Reset Transient
CDS Gain Accuracy
−3.0 dB CDS Gain
0 dB CDS Gain
+3 dB CDS Gain
+6 dB CDS Gain
Maximum Input Range Before Saturation
−3 dB CDS Gain
0 dB CDS Gain
+3 dB CDS Gain
+6 dB CDS Gain
Allowable OB Pixel Amplitude (See Figure 2)
0 dB CDS Gain (Default)
+6 dB CDS Gain
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
Gain Monotonicity
Gain Range
Low Gain (VGA Code 15, Default)
Maximum Gain (VGA Code 1023)
BLACK LEVEL CLAMP
Clamp Level Resolution
Clamp Level
Minimum Clamp Level (Code 0)
Maximum Clamp Level (Code 1023)
ADC
Resolution
Differential Nonlinearity (DNL)
No Missing Codes
Integral Nonlinearity (INL)
Full-Scale Input Voltage
VOLTAGE REFERENCE
Reference Top Voltage (REFT)
Reference Bottom Voltage (REFB)
SYSTEM PERFORMANCE
Gain Accuracy
Low Gain (VGA Code 15)
Maximum Gain (VGA Code 1023)
Peak Nonlinearity, 1.0 V Input Signal
Total Output Noise
Power Supply Rejection (PSR)
Min Typ Max Unit
Test Conditions/Comments
0.5
0.8
V
−3.3 −2.8 −2.3 dB
−0.5 0
+0.5 dB
2.4
2.9
3.4
dB
5.0
5.5
6.0
dB
1.4
V p-p
1.0
V p-p
0.7
V p-p
0.5
V p-p
The limit is the lower of AVDD + 0.2 V or 2.2 V.
VGA gain = 6.3 dB (Code 15, default value).
VGA gain = 6.3 dB (Code 15, default value).
−100
−50
+200 mV
+100 mV
1024
Guaranteed
Steps
6.3
dB
42.4
dB
1024
0
255
Steps
LSB
LSB
Measured at ADC output.
12
Bits
−1.0 ±0.5 +1.0 LSB
Guaranteed
1
4
LSB
2.0
V
1.4
V
0.4
V
Includes entire signal chain.
0 dB CDS gain.
5.8
6.3
6.8
dB
Gain = (0.0358 × Code) + 5.76 dB.
41.9 42.4 42.9 dB
0.1
0.2
%
6 dB VGA gain, 0 dB CDS gain applied.
0.5
LSB rms AC-grounded input, 6 dB VGA gain applied.
50
dB
Measured with step change on supply.
Rev. C | Page 5 of 92
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