ADA4940-2 データシートの表示（PDF） - Analog Devices

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ADA4940-2

Ultralow Power, Low Distortion Fully Differential ADC Driver

Analog Devices 

ADA4940-1/ADA4940-2

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

VS = 5 V.......................................................................................... 3

VS = 3 V.......................................................................................... 5

Absolute Maximum Ratings............................................................ 7

Thermal Resistance ...................................................................... 7

Maximum Power Dissipation ..................................................... 7

ESD Caution.................................................................................. 7

Pin Configurations and Function Descriptions ........................... 8

Typical Performance Characteristics ........................................... 10

Test Circuits..................................................................................... 19

Terminology .................................................................................... 20

Definition of Terms .................................................................... 20

Theory of Operation ...................................................................... 21

Data Sheet

Applications Information .............................................................. 22

Analyzing an Application Circuit ............................................ 22

Setting the Closed-Loop Gain .................................................. 22

Estimating the Output Noise Voltage ...................................... 22

Impact of Mismatches in the Feedback Networks ................. 23

Calculating the Input Impedance of an Application Circuit 23

Input Common-Mode Voltage Range ..................................... 24

Input and Output Capacitive AC Coupling............................ 25

Setting the Output Common-Mode Voltage .......................... 25

DISABLE Pin .............................................................................. 25

Driving a Capacitive Load......................................................... 25

Driving a High Precision ADC ................................................ 26

Layout, Grounding, and Bypassing.............................................. 27

ADA4940-1 LFCSP Example.................................................... 27

Outline Dimensions ....................................................................... 28

Ordering Guide .......................................................................... 29

REVISION HISTORY

3/12—Rev. A to Rev. B

Circuit Section ................................................................................ 23

Reorganized Layout............................................................Universal

Changes to Figure 71...................................................................... 25

Added ADA4940-1 8-Lead SOIC Package......................Universal

Changes to Driving a High Precision ADC Section

Changes to Features Section, Table 1, and Figure 1; Replaced

and Figure 73................................................................................... 26

Figure 2 .............................................................................................. 1

Changed ADA4940-1 Example Section to ADA4940-1 LFCSP

Changed VS = ±2 V(or +5 V) Section to VS = +5 V

Example Section ............................................................................. 27

Section................................................................................................ 3

Changes to Ordering Guide .......................................................... 29

Changes to VS = +5 V Section and Table 3.................................... 3

Changes to Table 4 and Table 5....................................................... 4

Changes to VS = 3 V Section and Table 6 ...................................... 5

Changes to Table 7 and Table 8....................................................... 6

Added Figure 5 and Table 12, Renumbered Sequentially ........... 9

Changes to Figure 7, Figure 8, and Figure 9................................ 10

Added Figure 15 and Figure 18; Changes to Figure 13,

Figure 14, and Figure 16 ................................................................ 11

Changes to Figure 19 and Figure 20............................................. 12

Changes to Figure 25, Figure 26, and Figure 27; Added

Figure 28, Figure 29, and Figure 30.............................................. 13

Changes to Figure 31, Figure 32, Figure 33, Figure 34, Figure 35,

and Figure 36................................................................................... 14

Changes to Figure 37, Figure38, Figure 39, and Figure 41........ 15

Changes to Figure 49, Figure 50, and Figure 51 ......................... 17

Added Figure 55 and Figure 57..................................................... 18

Changes to Differential VOS, Differential CMRR, and VOCM

CMRR Section ................................................................................ 20

Changes to Calculating the Input Impedance of an Application

12/11—Rev. 0 to Rev. A

Changes to Features Section, General Description

Section, Table 1 ..................................................................................1

Replaced Figure 1 and Figure 2 .......................................................1

Changes to VS = ±2.5 V (or +5 V) Section and Table 3................3

Changes to Table 6.............................................................................5

Replaced Figure 7, Figure 8, Figure 9, and Figure 10 ...................9

Replaced Figure 14, Figure 15, and Figure 17............................. 10

Replaced Figure 24 and Figure 27 ................................................ 12

Changes to Figure 37...................................................................... 14

Replaced Figure 43 and Figure 46 ................................................ 15

Replaced Figure 53 ......................................................................... 18

Changes to Estimating the Output Noise Voltage Section, Table

14, Table 15, and Calculating the Input Impedance of an

Application Circuit Section........................................................... 21

Changes to Input Common-Mode Voltage Range Section....... 22

Changes to Driving a High Precision ADC Section and

Figure 65 .......................................................................................... 24

10/11—Revision 0: Initial Version

Rev. B | Page 2 of 32

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