Test DAC ......................................................................................73
Transmit Test Modes ..................................................................73
Silicon Revision Readback .........................................................73
Applications Information...............................................................74
Application Circuit .....................................................................74
Host Processor Interface ............................................................74
PA/LNA Matching ......................................................................75
Command Reference ......................................................................77
REVISION HISTORY
5/11—Revision 0: Initial Version
ADF7023-J
Register Maps ..................................................................................78
BBRAM Register Description ...................................................80
MCR Register Description.........................................................90
Packet RAM Register Description............................................97
Outline Dimensions........................................................................98
Ordering Guide ...........................................................................98
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