ADIS16240 データシートの表示（PDF） - Analog Devices
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ADIS16240 Datasheet PDF : 20 Pages
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ADIS16240
Data Sheet
MEMORY MAP
Note that all registers are two bytes. All unused memory locations are reserved for future use.
Table 7. User Register Memory Map
Register
Name
Read/ Flash
Write Backup
FLASH_CNT
R
Yes
SUPPLY_OUT
R
No
XACCL_OUT
R
No
YACCL_OUT
R
No
ZACCL_OUT
R
No
AUX_ADC
R
No
TEMP_OUT
R
No
XPEAK_OUT
R
No
YPEAK_OUT
R
No
ZPEAK_OUT
R
No
XYZPEAK_OUT R
No
CAPT_BUF1
R
No 2
CAPT_BUF2
R
No2
DIAG_STAT
R
No
EVNT_CNTR
R
Yes
CHK_SUM
R
Yes
XACCL_OFF
R/W Yes
YACCL_OFF
R/W Yes
ZACCL_OFF
R/W Yes
CLK_TIME
R/W Yes
CLK_DATE
R/W Yes
CLK_YEAR
R/W Yes
WAKE_TIME
R/W Yes
WAKE_DATE
R/W Yes
ALM_MAG1
R/W Yes
ALM_MAG2
R/W Yes
ALM_CTRL
R/W Yes
XTRIG_CTRL
R/W Yes
CAPT_PNTR
R/W Yes
CAPT_CTRL
R/W Yes
GPIO_CTRL
R/W No
MSC_CTRL
R/W No
SMPL_PRD
R/W Yes
GLOB_CMD
W
Yes
Register
Address1
0x00
0x02
0x04
0x06
0x08
0x0A
0x0C
0x0E
0x10
0x12
0x14
0x16
0x18
0x1A
0x1C
0x1E
0x20
0x22
0x24
0x2E
0x30
0x32
0x34
0x36
0x38
0x3A
0x3C
0x3E
0x40
0x42
0x44
0x46
0x48
0x4A
Default
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x0000
0x0000
N/A
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x9000
0x9000
0x0000
0x0000
0x0000
0x0022
0x0000
0x0006
0x001F
N/A
Function
Flash memory write count
Output, power supply
Output, x-axis accelerometer
Output, y-axis accelerometer
Output, z-axis accelerometer
Output, auxiliary ADC input
Output, temperature
Output, x-axis acceleration peak
Output, y-axis acceleration peak
Output, z-axis acceleration peak
Output, sum-of-squares acceleration peak
Output, Capture Buffer 1, X and Y acceleration
Output, Capture Buffer 2, Z acceleration
Diagnostic, error flags
Diagnostic, event counter
Diagnostic, check sum value from firmware test
Calibration, x-axis acceleration offset adjustment
Calibration, y-axis acceleration offset adjustment
Calibration, z-axis acceleration offset adjustment
Clock, hour and minute
Clock, month and day
Clock, year
Wake-up setting, hour and minute
Wake-up setting, month and day
Alarm 1 amplitude threshold
Alarm 2 amplitude threshold
Alarm control
Capture, external trigger control
Capture, address pointer
Capture, configuration and control
General-purpose digital input/output control
Miscellaneous control
Internal sample period (rate) control
System command
Bit
Assignments
See Table 35
See Table 10
See Table 9
See Table 9
See Table 9
See Table 8
See Table 11
See Table 9
See Table 9
See Table 9
See Table 8
See Table 18
See Table 19
See Table 28
See Table 21
See Table 34
See Table 27
See Table 27
See Table 27
See Table 29
See Table 30
See Table 31
See Table 32
See Table 33
See Table 13
See Table 13
See Table 12
See Table 15
See Table 20
See Table 17
See Table 26
See Table 25
See Table 23
See Table 24
1 Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1.
2 The event capture buffer is also stored in flash, but the CAPT_BUFx registers, which only contain a single sample, are not stored in nonvolatile flash.
CS
SCLK
DIN
DOUT
R/W A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
NOTES
1. DOUT BITS ARE BASED ON THE PREVIOUS 16-BIT SEQUENCE, WHEN R/W = 0.
Figure 18. SPI Communication Bit Sequence
R/W A6 A5
D15 D14 D13
Rev. C | Page 10 of 20
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