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ADM1065 データシートの表示(PDF) - Analog Devices

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ADM1065
ADI
Analog Devices ADI
ADM1065 Datasheet PDF : 28 Pages
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ADM1065
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Data Sheet
40 39 38 37 36 35 34 33 32 31
VX1 1
VX2 2
VX3 3
VX4 4
VX5 5
VP1 6
VP2 7
VP3 8
VP4 9
VH 10
PIN 1
INDICATOR
ADM1065
TOP VIEW
(Not to Scale)
30 PDO1
29 PDO2
28 PDO3
27 PDO4
26 PDO5
25 PDO6
24 PDO7
23 PDO8
22 PDO9
21 PDO10
11 12 13 14 15 16 17 18 19 20
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE LFCSP HAS AN EXPOSED PAD ON THE BOTTOM.
THIS PAD IS A NO CONNECT (NC). IF POSSIBLE, THIS
PAD SHOULD BE SOLDERED TO THE BOARD FOR
IMPROVED MECHANICAL STABILITY.
Figure 3. LFCSP Pin Configuration
48 47 46 45 44 43 42 41 40 39 38 37
NC 1
VX1 2
VX2 3
VX3 4
VX4 5
VX5 6
VP1 7
VP2 8
VP3 9
VP4 10
VH 11
NC 12
PIN 1
INDICATOR
ADM1065
TOP VIEW
(Not to Scale)
36 NC
35 PDO1
34 PDO2
33 PDO3
32 PDO4
31 PDO5
30 PDO6
29 PDO7
28 PDO8
27 PDO9
26 PDO10
25 NC
13 14 15 16 17 18 19 20 21 22 23 24
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 4. TQFP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
LFCSP1
TQFP
Mnemonic
13, 15 to 20, 1, 12, 13, 16, NC
37, 38
18 to 25, 36,
37, 44, 45, 48
1 to 5
2 to 6
VX1 to VX5
(VXx)
6 to 9
7 to 10
VP1 to VP4
(VPx)
10
11
VH
11
12
14
21 to 30
31
32
33
34
35
36
14
15
17
26 to 35
38
39
40
41
42
43
AGND2
REFGND2
REFOUT
PDO10 to PDO1
PDOGND2
VCCP
A0
A1
SCL
SDA
Description
No Connect. Do not connect to this pin.
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V
to 1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering
the input attenuation on a potential divider connected to these pins, the output of which
connects to a supply fault detector. These pins allow thresholds from 2.5 V to 6.0 V, from
1.25 V to 3.00 V, and from 0.573 V to 1.375 V.
High Voltage Input to Supply Fault Detectors. Two input ranges can be set by altering the
input attenuation on a potential divider connected to this pin, the output of which connects
to a supply fault detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
Ground Return for Input Attenuators.
Ground Return for On-Chip Reference Circuits.
Reference Output, 2.048 V. Note that the capacitor must be connected between this pin
and REFGND. A 10 µF capacitor is recommended for this purpose.
Programmable Output Drivers.
Ground Return for Output Drivers.
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between
this pin and GND. A 10 µF capacitor is recommended for this purpose.
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.
SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.
Rev. E | Page 8 of 28

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