ADM1186(Rev0) データシートの表示（PDF） - Analog Devices

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ADM1186
(Rev.:Rev0)

Quad Voltage Up and Down Sequencer and Monitor with Programmable Timing

Analog Devices 

ADM1186

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

GND 1

20 VCC

VIN1 2

19 OUT1

VIN2 3

VIN3 4

VIN4 5

ADM1186-1

TOP VIEW

(Not to Scale)

18 OUT2

17 OUT3

16 OUT4

UP 6

15 PWRGD

DOWN 7

14 SEQ_DONE

FAULT 8

13 BLANK_DLY

DLY_EN_OUT1 9

12 DLY_EN_OUT4

DLY_EN_OUT2 10

11 DLY_EN_OUT3

GND 1

VIN1 2

VIN2 3

VIN3 4

VIN4 5

UP/DOWN 6

DLY_EN_OUT2 7

DLY_EN_OUT3 8

16 VCC

ADM1186-2

TOP VIEW

(Not to Scale)

15 OUT1

14 OUT2

13 OUT3

12 OUT4

11 PWRGD

10 BLANK_DLY

9 DLY_EN_OUT4

Figure 3. ADM1186-1 Pin Configuration

Figure 4. ADM1186-2 Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

ADM1186-1 ADM1186-2 Mnemonic

1

1

GND

2

2

VIN1

3

3

VIN2

4

4

VIN3

5

5

VIN4

6

UP

7

DOWN

6

UP/DOWN

8

FAULT

9

DLY_EN_OUT1

10

7

DLY_EN_OUT2

11

8

DLY_EN_OUT3

Description

Chip Ground Pin.

Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V

reference. Can be used to monitor a voltage rail via a resistor divider. The output of this

comparator is monitored by the state machine.

Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V

reference. Can be used to monitor a voltage rail via a resistor divider. The output of this

comparator is monitored by the state machine.

Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V

reference. Can be used to monitor a voltage rail via a resistor divider. The output of this

comparator is monitored by the state machine.

Noninverting Comparator Input. The voltage on this pin is compared with a 0.6 V

reference. Can be used to monitor a voltage rail via a resistor divider. The output of this

comparator is monitored by the state machine.

Noninverting Comparator Input. A rising edge on this pin initiates a power-up sequence

when the ADM1186-1 is in the WAIT START state.

Noninverting Comparator Input. A falling edge on this pin initiates a power-down

sequence when the ADM1186-1 is in the POWER-UP DONE state.

Noninverting Comparator Input. A rising edge on this pin initiates a power-up sequence

when the ADM1186-2 is in the WAIT START state. A falling edge on this pin initiates a

power-down sequence when the ADM1186-2 is in the POWER-UP DONE state.

Active Low, Bidirectional, Open-Drain Pin. When an internal fault is detected by the

ADM1186-1 state machine, this pin is asserted low and the SET FAULT state is entered.

An external device pulling this pin low also causes the ADM1186-1 to enter the SET

FAULT state.

Timing Input. The capacitor connected to this input sets the time delay between the UP

input initiating a power-up sequence and OUT1 being asserted high. During a power-

down sequence, this input sets the time delay between OUT1 being asserted low and

SEQ_DONE being asserted low.

Timing Input. The capacitor connected to this input sets the time delay between VIN1

coming into compliance and OUT2 being asserted high during a power-up sequence.

During a power-down sequence, this input sets the time delay between OUT2 being

asserted low and OUT1 being asserted low.

Timing Input. The capacitor connected to this input sets the time delay between VIN2

coming into compliance and OUT3 being asserted high during a power-up sequence.

During a power-down sequence, this input sets the time delay between OUT3 being

asserted low and OUT2 being asserted low.

Rev. 0 | Page 7 of 28

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