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ADM8839ACPZ-REEL データシートの表示(PDF) - Analog Devices

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ADM8839ACPZ-REEL
ADI
Analog Devices ADI
ADM8839ACPZ-REEL Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VCC 1
VOUT 2
LDO_IN 3
+5VOUT 4
+5VIN 5
PIN 1
INDICATOR
ADM8839
TOP VIEW
15 C4–
14 C2+
13 C2–
12 C3+
11 C3–
ADM8839
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1
VCC
Positive Supply Voltage Input. Connect this pin to the 3 V supply with a 2.2 μF decoupling capacitor. Must be
electrically tied together with Pin 8 by a PCB trace.
2
VOUT
Voltage Doubler Output. This is derived by doubling the 3 V supply. A 2.2 μF capacitor to ground is required
on this pin.
3
LDO_IN
Voltage Regulator Input. The user can bypass this circuit by using the LDO_ON/OFF pin.
4
+5VOUT
5 V Output. This is derived by doubling and regulating the 3 V supply. A 2.2 μF capacitor to ground is required
on this pin to stabilize the regulator.
5
+5VIN
5 V Input. This is the input to the voltage tripler and inverter charge pump circuits.
6
LDO_ON/OFF Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage
doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the
use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into
the voltage tripler and inverter circuits of the ADM8839.
7
SHDN
Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing generator and enables
the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V.
8
VCC
Connect this pin to VCC. Must be electrically tied with Pin 1 by a PCB trace.
9
GND
Connect this pin to GND. Must be electrically tied with Pin 18 by a PCB trace.
10
+15VOUT
15 V Output. This is derived by tripling the 5 V regulated output. A 0.22 μF capacitor is required on this pin.
11, 12 C3−, C3+
External Capacitor C3 is connected between these pins. A 0.22 μF capacitor is recommended.
13, 14 C2−, C2+
External Capacitor C2 is connected between these pins. A 0.22 μF capacitor is recommended.
15, 16 C4−, C4+
External Capacitor C4 is connected between these pins. A 0.22 μF capacitor is recommended.
17
−15VOUT
−15 V Output. This is derived by tripling and inverting the 5 V regulated output. A 0.22 μF capacitor is required
on this pin.
18
GND
Device Ground. Must be electrically tied with Pin 9 by a PCB trace.
19, 20 C1−, C1+
External Capacitor C1 is connected between these pins. A 2.2 μF capacitor is recommended.
Rev. C | Page 5 of 12

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