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ADM823_VC データシートの表示(PDF) - Analog Devices

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ADM823_VC Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADM823/ADM824/ADM825
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RESET 1
5 VCC
ADM823
GND 2 TOP VIEW
(Not to Scale)
MR 3
4 WDI
Figure 2. ADM823 Pin Configuration
RESET 1
5 VCC
ADM824
GND 2 TOP VIEW
(Not to Scale)
RESET 3
4 WDI
Figure 3. ADM824 Pin Configuration
RESET 1
5 VCC
ADM825
GND 2 TOP VIEW
(Not to Scale)
RESET 3
4 MR
Figure 4. ADM825 Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic
1
RESET
2
GND
3
MR (ADM823)
RESET (ADM824/ADM825)
4
WDI (ADM823/ADM824)
MR (ADM825)
5
VCC
Description
Active Low, Push-Pull Reset Output. Asserted whenever VCC is below the reset threshold, VTH.
Ground.
Manual Reset Input. This is an active low input which, when forced low for at least 1 μs, generates
a reset. It features a 52 kΩ internal pull-up.
Active High, Push-Pull Reset Output.
Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration
of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is
generated.
Manual Reset Input. This is an active low input which, when forced low for at least 1 μs, generates
a reset. It features a 52 kΩ internal pull-up.
Power Supply Voltage Being Monitored.
Rev. C | Page 6 of 12

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