ADN2804ACPZ-500RL7(Rev0) データシートの表示（PDF） - Analog Devices
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ADN2804ACPZ-500RL7
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
ADN2804ACPZ-500RL7 Datasheet PDF : 24 Pages
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ADN2804
JITTER SPECIFICATIONS
TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 223 − 1,
unless otherwise noted.
Table 2.
Parameter
PHASE-LOCKED LOOP CHARACTERISTICS
Jitter Transfer Bandwidth
Jitter Peaking
Jitter Generation
Jitter Tolerance
Conditions
OC-12
OC-12
OC-12, 12 kHz to 5 MHz
OC-12, 223 − 1 PRBS
30 Hz1
300 Hz1
25 kHz
250 kHz1
Min Typ
Max
75
0
0.001
0.011
130
0.03
0.003
0.026
100
44
2.5
1.0
Unit
kHz
dB
UI rms
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
1 Jitter tolerance of the ADN2804 at these jitter frequencies is better than what the test equipment is able to measure.
Rev. 0 | Page 4 of 24
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