ADN2806 データシートの表示（PDF） - Analog Devices

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ADN2806

622 Mbps Clock and Data Recovery IC

Analog Devices 

ADN2806

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Jitter Specifications....................................................................... 3

Output and Timing Specifications ............................................. 4

Absolute Maximum Ratings............................................................ 5

Thermal Characteristics .............................................................. 5

ESD Caution.................................................................................. 5

Timing Characteristics..................................................................... 6

Pin Configuration and Function Descriptions............................. 7

I2C Interface Timing and Internal Register Description............. 8

REVISION HISTORY

4/12—Rev. B to Rev. C

Change to General Description Section ........................................ 1

Change to Output Clock Range Parameter, Table 1 .................... 3

Changed Pin 1 from VCC to TEST1 and Pin 32 from VCC

to TEST2 Throughout; Changes to Figure 5 and Table 5............ 7

Changes to Table 6 and Table 10..................................................... 9

Changes to Ordering Guide; Updated Outline Dimensions .... 20

Jitter Specifications......................................................................... 10

Theory of Operation ...................................................................... 11

Functional Description.................................................................. 13

Frequency Acquisition............................................................... 13

Input Buffer Amplifier............................................................... 13

Lock Detector Operation .......................................................... 13

SQUELCH Modes ...................................................................... 13

I2C Interface ................................................................................ 14

Reference Clock (Optional) ...................................................... 15

Applications Information .............................................................. 17

PCB Design Guidelines ............................................................. 17

Outline Dimensions ....................................................................... 20

Ordering Guide .......................................................................... 20

5/10—Rev. A to Rev. B

Changes to Figure 5 and Table 5......................................................7

Changes to Figure 19...................................................................... 17

2/09—Rev. 0 to Rev. A

Updated Outline Dimensions....................................................... 20

Changes to Ordering Guide .......................................................... 20

2/06—Revision 0: Initial Version

Rev. C | Page 2 of 20

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