ADN2815(Rev0) データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
ADN2815 Datasheet PDF : 24 Pages
| |||
I2C INTERFACE TIMING AND INTERNAL REGISTER DESCRIPTION
SLAVE ADDRESS [6...0]
R/W
CTRL.
1
A5
0
0
0
0
0
X
MSB = 1 SET BY
PIN 19
0 = WR
1 = RD
Figure 6. Slave Address Configuration
ADN2815
S SLAVE ADDR, LSB = 0 (WR) A(S) SUB ADDR A(S) DATA A(S)
Figure 7. I2C Write Data Transfer
DATA A(S) P
S SLAVE ADDR, LSB = 0 (WR) A(S) SUB ADDR A(S) S SLAVE ADDR, LSB = 1 (RD) A(S) DATA A(M)
DATA A(M) P
S = START BIT
A(S) = ACKNOWLEDGE BY SLAVE
P = STOP BIT
A(M) = LACK OF ACKNOWLEDGE BY MASTER
A(M) = ACKNOWLEDGE BY MASTER
Figure 8. I2C Read Data Transfer
START BIT
SDA
SLAVE ADDRESS
A6
A5
SCK
S
SLADDR[4...0]
SUB ADDRESS
A7
A0
DATA
D7
D0
STOP BIT
WR ACK
SUB ADDR[6...1]
ACK
Figure 9. I2C Data Transfer Timing
DATA[6...1]
ACK
P
tF
SDA
SCK
S
tSU;DAT
tHD;STA
tR
tLOW
tHD;STA
tHD;DAT
tF
tSU;STO
tHIGH tSU;STA
S
Figure 10. I2C Port Timing Diagram
tBUF
tR
P
S
Rev. 0 | Page 9 of 24
Share Link: 