ADN2819 データシートの表示（PDF） - Analog Devices

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ADN2819

Multirate to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

Analog Devices 

ADN2819

TABLE OF CONTENTS

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 6

Thermal Characteristics .............................................................. 6

ESD Caution.................................................................................. 6

Pin Configuration and Function Descriptions............................. 7

Definition of Terms.......................................................................... 9

Maximum, Minimum, and Typical Specifications ................... 9

Input Sensitivity and Input Overdrive....................................... 9

Single-Ended vs. Differential ...................................................... 9

LOS Response Time ................................................................... 10

Jitter Specifications..................................................................... 10

Theory of Operation ...................................................................... 12

Functional Description .................................................................. 14

Multirate Clock and Data Recovery......................................... 14

REVISION HISTORY

5/04—Data Sheet Changed from Rev. A to Rev. B

Updated Format..............................................................Universal

Changes to Specifications ............................................................ 3

Changes to Table 7 and Table 8................................................. 15

Updated Outline Dimensions ................................................... 21

Changes to Ordering Guide ...................................................... 21

1/03—Data Sheet Changed from Rev. 0 to Rev. A

Changes to Table IV ................................................................... 12

Updated OUTLINE DIMENSIONS ........................................ 16

Limiting Amplifier ..................................................................... 14

Slice Adjust .................................................................................. 14

Loss of Signal (LOS) Detector .................................................. 14

Reference Clock.......................................................................... 14

Lock Detector Operation .......................................................... 15

Squelch Mode ............................................................................. 16

Test Modes: Bypass and Loopback........................................... 16

Applications Information .............................................................. 17

PCB Design Guidelines ............................................................. 17

Choosing AC-Coupling Capacitors ......................................... 19

DC-Coupled Application .......................................................... 20

LOL Toggling During Loss of Input Data............................... 20

Outline Dimensions ....................................................................... 21

Ordering Guide .......................................................................... 21

Rev. B | Page 2 of 24

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