ADN2850BRUZ25(RevF) データシートの表示（PDF） - Analog Devices
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ADN2850BRUZ25 Datasheet PDF : 30 Pages
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Data Sheet
FEATURES
Dual-channel, 1024-position resolution
25 kΩ, 250 kΩ nominal resistance
Maximum ±8% nominal resistor tolerance error
Low temperature coefficient: 35 ppm/°C
2.7 V to 5 V single supply or ±2.5 V dual supply
Current monitoring configurable function
SPI-compatible serial interface
Nonvolatile memory stores wiper settings
Power-on refreshed with EEMEM settings
Permanent memory write protection
Resistance tolerance stored in EEMEM
26 bytes extra nonvolatile memory for user-defined
information
1M programming cycles
100-year typical data retention
APPLICATIONS
SONET, SDH, ATM, Gigabit Ethernet, DWDM laser diode
driver, optical supervisory systems
Mechanical rheostat replacement
Instrumentation gain adjustment
Programmable filters, delays, time constants
Sensor calibration
GENERAL DESCRIPTION
The ADN2850 is a dual-channel, nonvolatile memory, digitally
controlled resistor with 1024-step resolution, offering guaranteed
maximum low resistor tolerance error of ±8%. The device performs
the same electronic adjustment function as a mechanical rheostat
with enhanced resolution, solid state reliability, and superior low
temperature coefficient performance. The versatile programming
of the ADN2850 via an SPI-compatible serial interface allows 16
modes of operation and adjustment including scratchpad
programming, memory storing and restoring, increment/
decrement, ±6 dB/step log taper adjustment, wiper setting
readback, and extra EEMEM for user-defined information such as
memory data for other components, look-up table, or system
identification information.
In the scratchpad programming mode, a specific setting can
be programmed directly to the RDAC register, which sets the
resistance between Terminal W and Terminal B. This setting can
be stored into the EEMEM and is restored automatically to the
RDAC register during system power-on.
Nonvolatile Memory, Dual
1024-Position Digital Resistor
ADN2850
FUNCTIONAL BLOCK DIAGRAM
CS
CLK
SDI
SDO
ADDR
DECODE
SERIAL
INTERFACE
RDAC1
REGISTER
EEMEM1
ADN2850
W1
B1
RDAC1
PR
WP
RDY
VDD
VSS
GND
POWER-ON
RESET
EEMEM
CONTROL
RDAC1
REGISTER
EEMEM2
RTOL*
26 BYTES
USER EEMEM
W2
B2
RDAC2
I1
V1
CURRENT
MONITOR
I2
V2
*RWB FULL SCALE TOLERANCE.
Figure 1.
The EEMEM content can be restored dynamically or through
external PR strobing, and a WP function protects EEMEM
contents. To simplify the programming, the independent or
simultaneous linear-step increment or decrement commands
can be used to move the RDAC wiper up or down, one step at a
time. For logarithmic ±6 dB changes in the wiper setting, the
left or right bit shift command can be used to double or halve the
RDAC wiper setting.
The ADN2850 patterned resistance tolerance is stored in the
EEMEM. The actual full scale resistance can, therefore, be
known by the host processor in readback mode. The host can
execute the appropriate resistance step through a software
routine that simplifies open-loop applications as well as
precision calibration and tolerance matching applications.
The ADN2850 is available in the 5 mm × 5 mm 16-lead frame
chip scale LFCSP and thin, 16-lead TSSOP. The device is
guaranteed to operate over the extended industrial temperature
range of −40°C to +85°C.
In this data sheet, the terms nonvolatile memory and EEMEM
are used interchangeably and the terms digital resistor and
RDAC are used interchangeably
Rev. F
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