ADN2891(RevA) データシートの表示（PDF） - Analog Devices
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ADN2891 Datasheet PDF : 16 Pages
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FEATURES
Input sensitivity: 4 mV p-p
80 ps rise/fall times
CML outputs: 700 mV p-p differential
Programmable LOS detector: 3.5 mV to 35 mV
Rx signal strength indicator (RSSI)
SFF-8472-compliant average power measurement
Single-supply operation: 3.3 V
Low power dissipation: 145 mW
Available in space-saving 3 mm × 3 mm, 16-lead LFCSP
Extended temperature range: −40°C to +95°C
SFP reference design available
APPLICATIONS
SFP/SFF/GBIC optical transceivers
OC-3/OC-12/OC-48, GbE, Fibre Channel (FC) receivers
10GBASE-LX4 transceivers
WDM transponders
3.3 V, 3.2 Gbps,
Limiting Amplifier
ADN2891
GENERAL DESCRIPTION
The ADN2891 is a 3.2 Gbps limiting amplifier with integrated
loss-of-signal (LOS) detection circuitry and a received signal
strength indicator (RSSI). This part is optimized for SONET,
Gigabit Ethernet (GbE), and Fibre Channel optoelectronic
conversion applications. The ADN2891 has a differential input
sensitivity of 4 mV p-p and accepts up to a 2.0 V p-p differential
input overload voltage. The ADN2891 supports current mode
logic (CML) outputs with controlled rise and fall times.
By monitoring the bias current through a photodiode, the on-
chip RSSI detector measures the average power received with
2% typical linearity over the entire valid input range of the
photodiode. The on-chip RSSI detector facilitates SFF-8472-
compliant optical transceivers by eliminating the need for
external RSSI detector circuitry.
Additional features include a programmable loss-of-signal
(LOS) detector and output squelch.
The ADN2891 is available in a 3 mm × 3 mm, 16-lead LFCSP.
FUNCTIONAL BLOCK DIAGRAM
AVCC AVEE
DRVCC DRVEE
ADN2891
PIN
ADN2880
NIN
DRVCC
50Ω
50Ω
OUTP
OUTN
50Ω
PD_VCC
PD_CATHODE
50Ω
3kΩ
VREF
RSSI/LOS
DETECTOR
+V
10kΩ
LOS
RSSI_OUT ADuC7020
CAZ1
CAZ2
0.01μF
THRADJ SQUELCH
Figure 1.
Rev. A
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©2005 Analog Devices, Inc. All rights reserved.
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