ADNS-2051 データシートの表示（PDF） - HP => Agilent Technologies
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ADNS-2051 Datasheet PDF : 40 Pages
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Recommended Operating Conditions
Parameter
Operating Temperature
Power Supply Voltage
Symbol Min. Typ. Max. Units Notes
TA
0
40
˚C
VDD
4.25 5.0
5.5
volts Register values retained for
voltage transients below
4.25 V but greater than 4 V.
Power Supply Rise Time
VRT
Supply Noise
VN
100
ms
100
mV
Peak to peak within
0-100 MHz.
Clock Frequency
Serial Port Clock Frequency
Resonator Impendance
Distance from Lens Reference
Plane to Surface
fCLK
SCLK
XRES
Z
17.4 18.0 18.7 MHz Set by ceramic resonator.
fCLK/4 MHz
55
Ω
2.3
2.4
2.5
mm
Results in ±0.2 mm DOF.
(See Figure 10.)
Speed
Acceleration
Light Level onto IC
SDIO Read Hold Time
S
0
A
IRRINC
80
100
tHOLD
100
SDIO Serial Write-Write Time
tSWW
100
SDIO Serial Write-Read Time
tSWR
100
14
0.15
25,000
30,000
in/sec
g
mW/m2
µs
µs
µs
@ frame rate = 1500/second.
@ frame rate = 1500/second.
λ = 639 nm
λ = 875 nm
Hold time for valid data.
(Refer to Figure 28.)
Time between two write
commands. (Refer to Figure 31.)
Time between write and read
operation. (Refer to Figure 32.)
SDIO Serial Read-Write Time
tSRW
120
SDIO Serial Read-Read Time
tSRR
120
ns
Time between read and write
operation. (Refer to Figure 33.)
ns
Time between two read
commands. (Refer to Figure 33.)
Data Delay after PD
tCOMPUTE 3.2
ms
After tCOMPUTE, all registers
contain data from first image
after PD . Note that an addi-
tional 75 frames for AGC (shutter)
stabilization may be required if
mouse movement occurred
while PD was high. (Refer to
Figure 12.)
SDIO Write Setup Time
PD Pulse Width
(to power down the chip)
PD Pulse Width
(to reset the serial port)
tSETUP
60
tPDW
700
tPDR
100
ns
Data valid time before the rising
of SCLK. (Refer to Figure 26.)
µs
Pulse width to initiate the power
down cycle @ 1500 fps. (Refer
to Figure 12 and Figure 14.)
µs
Pulse width to reset the serial
port @ 1500 fps (but may also
initiate a power down cycle.
Normal PD recovery sequence
to be followed. (Refer to
Figure 15.)
Frame Rate
Bin Resistor
FR
1500
frames/s See Frame_Period register
section.
R1
15 K 15 K 37 K Ω
Refer to Figure 8.
8
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