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ADP3000 データシートの表示(PDF) - Analog Devices

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ADP3000 Datasheet PDF : 16 Pages
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ADP3000
THEORY OF OPERATION
The ADP3000 is a versatile, high frequency, switch mode power
supply (SMPS) controller. The regulated output voltage can be
greater than the input voltage (in boost or step-up mode) or less
than the input voltage (in buck or step-down mode). This
device uses a gated oscillator technique to provide high
performance with low quiescent current.
An uncommitted gain block on the ADP3000 can be connected
as a low battery detector. The inverting input of the gain block
is internally connected to the 1.245 V reference. The
noninverting input is available at the SET pin. A resistor divider,
connected between VIN and GND with the junction connected
to the SET pin, causes the AO output to go low when the low
battery set point is exceeded. The AO output is an open
collector NPN transistor that can sink in excess of 300 µA.
Figure 7 is a functional block diagram of the ADP3000. The
The ADP3000 provides external connections for both the
internal 1.245 V reference is connected to one input of the
collector and the emitter of its internal power switch,
comparator, and the other input is externally connected (via the
permitting both step-up and step-down modes of operation.
FB pin) to a resistor divider, which is connected to the regulated
output. When the voltage at the FB pin falls below 1.245 V, the
400 kHz oscillator turns on. The ADP3000 internal oscillator
typically provides a 1.7 µs on time and a 0.8 µs off time. A driver
amplifier provides base drive to the internal power switch, and
E the switching action raises the output voltage. When the voltage
at the FB pin exceeds 1.245 V, the oscillator shuts off. While the
oscillator is off, the ADP3000 quiescent current is only 500 µA.
T The comparator’s hysteresis ensures loop stability without
requiring external components for frequency compensation.
The maximum current in the internal power switch is set by
E connecting a resistor between VIN and the ILIM pin. When the
maximum current is exceeded, the switch is turned off. The
current limit circuitry has a time delay of about 0.3 µs. If an
L external resistor is not used, connect ILIM to VIN. This yields the
maximum feasible current limit. Further information on ILIM is
OBSO included in the Applications Information section.
For the step-up mode, the emitter (Pin SW2) is connected to
GND, and the collector (Pin SW1) drives the inductor. For step-
down mode, the emitter drives the inductor, while the collector
is connected to VIN.
The output voltage of the ADP3000 is set with two external
resistors. Three fixed voltage models are also available:
ADP3000-3.3 (3.3 V), ADP3000-5 (5 V), and ADP3000-12
(12 V). The fixed voltage models include laser-trimmed,
voltage-setting resistors on the chip. On the fixed voltage
models of the ADP3000, simply connect the feedback pin
(Pin 8) directly to the output voltage.
Rev. A | Page 9 of 16

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