ADT7460(2013) データシートの表示（PDF） - ON Semiconductor
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ADT7460 Datasheet PDF : 47 Pages
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ADT7460
INT
HIGH LIMIT
TEMP > HIGH LIMIT
Figure 31. Temperature > High Limit: INT Occurs
Analog Monitoring Cycle Time
The analog monitoring cycle begins when a 1 is written to
the start bit (Bit 0) of Configuration Register 1 (Reg. 0x40).
The ADC measures each analog input in turn and, as each
measurement is completed, the result is automatically stored
in the appropriate value register. This round-robin monitoring
cycle continues unless disabled by writing a 0 to Bit 0 of
Configuration Register 1.
As the ADC is normally allowed to free-run in this manner,
the time taken to monitor all the analog inputs is normally not
of interest, since the most recently measured value of any
input can be read out at any time. For applications where the
monitoring cycle time is important, it can easily be calculated.
The total number of channels measured is
♦ Two Supply Voltage Inputs (2.5 V and VCC)
♦ Local Temperature
♦ Two Remote Temperatures
As mentioned previously, the ADC performs round-robin
conversions and takes 11.38 ms for each voltage
measurement, 12 ms for a local temperature reading, and
25.5 ms for each remote temperature reading.
The total monitoring cycle time for averaged voltage and
temperature monitoring is, therefore, nominally:
(2 11.38) ) 12 (2 25.5) + 85.76 ms
(eq. 2)
The round robin starts again 35 ms later. Therefore, all
channels are measured approximately every 120 ms.
Fan TACH measurements are made in parallel and are not
synchronized with the analog measurements in any way.
Status Registers
The results of limit comparisons are stored in Status
Registers 1 and 2. The status register bit for each channel
reflects the status of the last measurement and limit
comparison on that channel. If a measurement is within
limits, the corresponding status register bit is cleared to 0. If
the measurement is out-of-limits, the corresponding status
register bit is set to 1.
The state of the various measurement channels may be
polled by reading the status registers over the serial bus. In
Bit 7 (OOL) of Status Register 1 (Reg. 0x41), 1 means that an
out-of-limit event has been flagged in Status Register 2. This
means that you need only read Status Register 2 when this bit
is set. Alternatively, Pin 5 or Pin 14 can be configured as an
SMBALERT output. This automatically notifies the system
supervisor of an out-of-limit condition. Reading the status
registers clears the appropriate status bit as long as the error
condition that caused the interrupt has cleared. Status register
bits are “sticky.” Whenever a status bit is set, indicating an
out-of-limit condition, it remains set even if the event that
caused it has gone away (until read). The only way to clear the
status bit is to read the status register after the event has gone
away. Interrupt status mask registers (Reg. 0x74, 0x75) allow
individual interrupt sources to be masked from causing an
SMBALERT. However, if one of these masked interrupt
sources goes out-of-limit, its associated status bit is set in the
interrupt status registers.
OOL = 1 DENOTES A PARAMETER
MONITORED THROUGH STATUS REG 2
IS OUT-OF-LIMIT
Figure 32. Status Register 1
Table 24. STATUS REGISTER 1 (REG. 0X41)
Bit Mnemonic
Description
7
OOL
1 denotes a bit in Status Register 2 is set
and Status Register 2 should be read.
6
R2T
1 indicates that the Remote 2
temperature high or low limit has been
exceeded.
5
LT
1 indicates that the Local temperature
high or low limit has been exceeded.
4
R1T
1 indicates that the Remote 1
temperature high or low limit has been
exceeded.
3
−
Unused
2
VCC
1 indicates that the VCC high or low
limit has been exceeded.
1
−
Unused
0
2.5 V
1 indicates that the 2.5 V high or low
limit has been exceeded.
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