ADT7473ARQZ データシートの表示（PDF） - Analog Devices
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ADT7473ARQZ Datasheet PDF : 76 Pages
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ADT7473
SERIAL BUS INTERFACE
On PCs and servers, control of the ADT7473 is carried out
using the SMBus. The ADT7473 is connected to this bus as a
slave device, under the control of a master controller, which is
usually (but not necessarily) the ICH.
The ADT7473 has a fixed 7-bit serial bus address of 0101110
or 0x2E. The read/write bit must be added to get the 8-bit
address (01011100 or 0x5C). Data is sent over the serial bus in
sequences of nine clock pulses: eight bits of data followed by an
acknowledge bit from the slave device. Transitions on the data
line must occur during the low period of the clock signal and
remain stable during the high period, because a low-to-high
transition when the clock is high might be interpreted as a stop
signal. The number of data bytes that can be transmitted over
the serial bus in a single read or write operation is limited only
by what the master and slave devices can handle.
When all data bytes have been read or written, stop conditions
are established. In write mode, the master pulls the data line
high during the tenth clock pulse to assert a stop condition. In
read mode, the master device overrides the acknowledge bit by
pulling the data line high during the low period before the
ninth clock pulse; this is known as No Acknowledge. The
master takes the data line low during the low period before the
tenth clock pulse, and then high during the tenth clock pulse to
assert a stop condition.
Any number of bytes of data can be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
1
9
SCL
In the ADT7473, write operations contain either one or two
bytes, and read operations contain one byte. To write data to
one of the device data registers or read data from it, the address
pointer register must be set so the correct data register is
addressed, and then data can be written into that register or
read from it. The first byte of a write operation always contains
an address that is stored in the address pointer register. If data is
written to the device, the write operation contains a second data
byte that is written to the register selected by the address
pointer register.
This write operation is shown in Figure 14. The device address
is sent over the bus, and then R/W is set to 0. This is followed
by two data bytes. The first data byte is the address of the
internal data register to be written to, which is stored in the
address pointer register. The second data byte is the data to be
written to the internal data register.
When reading data from a register, there are two possibilities:
• If the ADT7473’s address pointer register value is unknown
or not the desired value, it must first be set to the correct
value before data can be read from the desired data register.
This is done by performing a write to the ADT7473, but
only the data byte containing the register address is sent,
because no data is written to the register. This is shown in
Figure 15.
A read operation is then performed consisting of the serial
bus address, R/W bit set to 1, followed by the data byte
read from the data register. This is shown in Figure 16.
• If the address pointer register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the address pointer
register, as shown in Figure 16.
1
9
SDA
0
START BY
MASTER
1
0
1
1
1
0
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADT7473
1
SCL (CONTINUED)
D6 D5 D4 D3 D2 D1 D0
FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
ADT7473
9
SDA (CONTINUED)
D7 D6 D5 D4 D3 D2 D1 D0
FRAME 3
DATA BYTE
ACK. BY STOP BY
ADT7473 MASTER
Figure 14. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
Rev. A | Page 11 of 76
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