ADT7475 データシートの表示（PDF） - ON Semiconductor
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ADT7475 Datasheet PDF : 58 Pages
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ADT7475
It is possible to read a data byte from a data register
without first writing to the address pointer register if the
address pointer register is already at the correct value.
However, it is not possible to write data to a register without
writing to the address pointer register because the first data
byte of a write is always written to the address pointer
register.
In addition to supporting the send byte and receive byte
protocols, the ADT7475 also supports the read byte protocol
(for more information, see System Management Bus
Specifications Rev. 2.0, available from Intel).
If several read or write operations must be performed in
succession, the master can send a repeat start condition
instead of a stop condition to begin a new operation.
Write Operations
The SMBus specification defines several protocols for
different types of read and write operations. The ones used
in the ADT7475 are discussed in this section. The following
abbreviations are used in the diagrams:
S—Start
P—Stop
R—Read
W—Write
A—Acknowledge
A—No acknowledge
The ADT7475 uses the following SMBus write protocols.
Send Byte
In this operation, the master device sends a single
command byte to a slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7−bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master asserts a stop condition on SDA and
the transaction ends.
For the ADT7475, the send byte protocol is used to write
a register address to RAM for a subsequent single−byte read
from the same address. This operation is shown in Figure 16.
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2
3
4
56
S
SLAVE
ADDRESS
W
A
REGISTER
ADDRESS
AP
Figure 16. Setting a Register Address for
Subsequent Read
If the master is required to read data from the register
immediately after setting up the address, it can assert a repeat
start condition immediately after the final ACK and carry
out a single−byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte
and one data byte to the slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7−bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on SDA and
the transaction ends.
The byte write operation is shown in Figure 17.
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2
3
4
5 6 78
S
SLAVE
ADDRESS
W
A
REGISTER
ADDRESS
A
DATA A P
Figure 17. Single−Byte Write to a Register
Read Operations
The ADT7475 uses the following SMBus read protocols.
Receive Byte
This operation is useful when repeatedly reading a single
register. The register address must be set up previously. In
this operation, the master device receives a single byte from
a slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7−bit slave address followed
by the read bit (high).
3. The addressed slave device asserts ACK on SDA.
4. The master receives a data byte.
5. The master asserts NO ACK on SDA.
6. The master asserts a stop condition on SDA, and
the transaction ends.
In the ADT7475, the receive byte protocol is used to read
a single byte of data from a register whose address has
previously been set by a send byte or write byte operation.
This operation is shown in Figure 18.
1
2
3
S
SLAVE
ADDRESS
R
A
4
DATA
56
AP
Figure 18. Single−Byte Read from a Register
Alert Response Address
Alert response address (ARA) is a feature of SMBus
devices that allows an interrupting device to identify itself
to the host when multiple devices exist on the same bus.
The SMBALERT output can be used as either an interrupt
output or an SMBALERT. One or more outputs can be
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