ADV7183BBSTZ データシートの表示（PDF） - Analog Devices

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ADV7183BBSTZ

Multiformat SDTV Video Decoder

Analog Devices 

ADV7183B

TABLE OF CONTENTS

Introduction ...................................................................................... 4

Analog Front End ......................................................................... 4

Standard Definition Processor (SDP)........................................ 4

Functional Block Diagram .......................................................... 5

specifications ..................................................................................... 6

Electrical Characteristics............................................................. 6

Video Specifications..................................................................... 7

Timing Specifications .................................................................. 8

Analog Specifications................................................................... 8

Thermal Specifications ................................................................ 9

Timing Diagrams.......................................................................... 9

Absolute Maximum Ratings.......................................................... 10

ESD Caution................................................................................ 10

Pin Configuration and Function Descriptions........................... 11

Analog Front End ........................................................................... 13

Analog Input Muxing ................................................................ 13

Manual Input Muxing................................................................ 15

Global Control Registers ............................................................... 16

Power-Save Modes...................................................................... 16

Reset Control .............................................................................. 16

Global Pin Control ..................................................................... 17

Global Status Registers................................................................... 19

Identification............................................................................... 19

Status 1 ......................................................................................... 19

Autodetection Result.................................................................. 19

Status 2 ......................................................................................... 19

Status 3 ......................................................................................... 19

Standard Definition Processor (SDP).......................................... 20

SD Luma Path ............................................................................. 20

SD Chroma Path......................................................................... 20

Sync Processing........................................................................... 21

VBI Data Recovery..................................................................... 21

General Setup.............................................................................. 21

Color Controls ............................................................................ 23

Clamp Operation........................................................................ 25

Luma Filter .................................................................................. 26

Chroma Filter.............................................................................. 29

Gain Operation........................................................................... 30

Chroma Transient Improvement (CTI) .................................. 33

Digital Noise Reduction (DNR) ............................................... 34

Comb Filters................................................................................ 35

AV Code Insertion and Controls ............................................. 37

Synchronization Output Signals............................................... 39

Sync Processing .......................................................................... 46

VBI Data Decode ....................................................................... 47

Pixel Port Configuration ............................................................... 59

MPU Port Description................................................................... 60

Register Accesses ........................................................................ 61

Register Programming............................................................... 61

I2C Sequencer.............................................................................. 61

IP2PC Register Maps ..................................................................... 62

I2PC Register Map Details ........................................................... 6618H

I C2

52H

Programming

Examples..........................................................

8819H

53HExamples in this Section use a 28 MHz Clock. ...................... 88120H

54HExamples Using 27 MHz Clock................................................ 9212H

PCB 5H Layout Recommendations.................................................... 9412H

56HAnalog Interface Inputs ............................................................. 94123H

Power 57H Supply Decoupling ......................................................... 94124H

PLL 58H ............................................................................................... 94125H

Digit 59H al Outputs (Both Data and Clocks) ................................ 94126H

Digit 60H al Inputs .............................................................................. 94127H

Ant 61H ialiasing Filters ..................................................................... 95128H

Rev. B | Page 2 of 100

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