ADV7322(RevPrA) データシートの表示（PDF） - Analog Devices
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ADV7322 Datasheet PDF : 88 Pages
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Preliminary Technical Data
ADV7322
CLKIN_A
CONTROL
INPUTS
P_VSYNC,
P_HSYNC,
P_BLANK
Y7–Y0
t9 t10
Cb0
Y0
Cr0
Y1
Crxxx
Yxxx
t12
t13
t11
t14
CONTROL
OUTPUTS
t9 = CLOCK HIGH TIME
t10 = CLOCK LOW TIME
t11 = DATA SETUP TIME
t12 = DATA HOLD TIME
Figure 7. PS 4:2:2 8-Bit Interleaved at 54 MHz HSYNC /VSYNC Input Mode [Input Mode 111]
CLKIN_B*
t9
t10
Y7–Y0
FF
00
00
XY
Cb0
Y0
Cr0
Y1
t12
t11
CONTROL
OUTPUTS
t12
t11
t13
t9 = CLOCK HIGH TIME
t10 = CLOCK LOW TIME
t11 = DATA SETUP TIME
t12 = DATA HOLD TIME
t14
*CLKIN_B USED IN THIS PS ONLY MODE.
Figure 8. PS Only 4:2:2 8-Bit Interleaved at 27 MHz EAV/SAV Input Mode [Input Mode 100]
Rev. PrA | Page 11 of 88
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