AH420-EPCB1960 データシートの表示（PDF） - TriQuint Semiconductor
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AH420-EPCB1960 Datasheet PDF : 9 Pages
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AH420
4W High Linearity InGaP HBT Amplifier
Mechanical Information
This package is lead-free/green/RoHS-compliant. The plating material on the backside metallization is Matte Tin. It is compatible with both
lead-free (maximum 260 °C reflow temperature) and lead (maximum 245 °C reflow temperature) soldering processes.
Outline Drawing
AH420G
YXXX-Z
Product Marking
The AH420 will be marked with an “AH420G”
designator with a lot code marked below the
part designator. The “Y” represents the last
digit of the year the part was manufactured, the
“XXX” is an auto-generated number, and “Z”
refers to a wafer number in a lot batch.
Tape and reel specifications for this part are
located on the website in the “Application
Notes” section.
ESD / MSL Information
Mounting Configuration / Land Pattern
Notes:
1. A heatsink underneath the area of the PCB for the mounted device is recommended for proper thermal
operation. Damage to the device can occur without the use of one.
2. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80
/ .0135”) diameter drill and have a final plated thru diameter of .25 mm (.010”).
3. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal
performance.
4. Mounting screws can be added near the part to fasten the board to a heatsink. Ensure that the ground /
thermal via region contacts the heatsink.
5. Do not put solder mask on the backside of the PC board in the region where the board contacts the heatsink.
6. RF trace width depends upon the PC board material and construction.
7. Use 1 oz. Copper minimum.
8. All dimensions are in millimeters
ESD Rating:
Value:
Test:
Standard:
Class 1A
Passes 250V to <500V
Human Body Model (HBM)
JEDEC Standard JESD22-A114
ESD Rating:
Value:
Test:
Standard:
Class IV
Passes ≥ 1000V min.
Charged Device Model (CDM)
JEDEC Standard JESD22-C101
MSL Rating: Level 3 at +260 °C convection reflow
Standard: JEDEC Standard J-STD-020
Functional Pin Layout
Pin
1
2, 11
3, 4, 5, 6
7, 8, 9, 10
12
Function
VBIAS
No Connect
RF Input
VCC / RF Output
IREF
Specifications and information are subject to change without notice
TriQuint Semiconductor Inc • Phone 1-503-615-9000 • FAX: 503-615-8900 • e-mail: info-sales@tqs.com • Web site: www.TriQuint.com
Page 9 of 9 July 2010
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