AI2152 データシートの表示（PDF） - A1 PROs co., Ltd.

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AI2152

Digital Signal Processor for Color CCD Cameras

A1 PROs co., Ltd. 

Ai2152

ADDRESS

NAME

BIT

CONTENTS

26

(106Eh)

TV_V_STOP[7:0]

Vertical active stop line of each field. (Unit: 1 Line)

7:0

Note:

NTSC Æ 103h.

PAL Æ 135h.

27

(106Fh)

V_V_STOP[8]

0

Reserved

7:1

28

(1080h)

CCD_SEL[1:0]

Reserved

TEST_IMG[1:0]

CCD Select:

00: NTSC 510X492

1:0 01: PAL 500X582

10: NTSC 768X494

11: PAL 752X582

5:2

Test Image mode

00: Disable Test Image (normal mode)

7:6 01: Replace AFE image data to internal test Gray pattern.

10: White Image

11: Black Image

H_INV

0 H inverse. (1:inverted)

29

(1081h)

RG_INV

AD_LH_RIS

Reserved

1 RG inverse. (1:inverted)

2 Data Latch with ADCLK edge. (0:falling edge 1:rising edge)

6:4

CCD_SEL

7 1: for A1PROs CCD

H1_DELAY[2:0]

2:0 H1 delay adjustment. (0-14ns delay)

2A

(1082h)

Reserved

H2_DELAY[2:0]

3

6:4 H2 delay adjustment. (0-14ns delay)

Reserved

7

2B

(1083h)

RG_DELAY[3:0]

RG_WIDTH[2:0]

Reserved

3:0 RG delay adjustment. (0-22ns delay)

6:4 RG pulse width adjustment. (Decreasing 0-14ns)

7

2C

(1084h)

SHP_DELAY[3:0]

SHP_WIDTH[2:0]

Reserved

3:0 SHP delay adjustment. (0-22ns delay)

6:4 SHP pulse width adjustment. (Decreasing 0-14ns)

7

2D

(1085h)

2E

(1086h)

2F

(1087h)

SHD_DELAY[3:0]

ADCLK_DELAY[3:0]

3:0 SHD delay adjustment. (0-22ns delay)

7:4 ADCLK delay. (0-22ns delay)

OBCLP_H_START[7:0] 7:0

Horizontal start for OBCLP. (Unit: 1 pixel)

OBCLP_H_START[9:8] 1:0

10

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