M27W256 データシートの表示（PDF） - STMicroelectronics

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M27W256

256 Kbit (32Kb x 8) Low Voltage UV EPROM and OTP EPROM

STMicroelectronics 

M 27W 256

Figure 6. Programming and Verify Modes AC Waveforms

A0-A14

Q0-Q7

VPP

VCC

E

G

tAVEL

DATA IN

tQVEL

tVPHEL

tVCHEL

tELEH

VALID

tEHQX

DATA OUT

tGLQV

tQXGL

PROGRAM

VERIFY

tGHQZ

tGHAX

AI00759

Figure 7. Programming Flowchart

VCC = 6.25V, VPP = 12.75V

n=0

NO

++n

= 25

YES

P = 100µs Pulse

NO

VERIFY

YES

++ Addr

FAIL

Last NO

Addr

YES

CHECK ALL WORDS

1st: VCC = 5V

2nd: VCC = 2.7V

AI00707D

8/15

PRESTO II Programming Algorithm

PRESTO II Programming Algorithm allows to pro-

gram the whole array with a guaranteed margin, in

a typical time of 3.5 seconds. Programming with

PRESTO II involves the application of a sequence

of 100µs program pulses to each byte until a cor-

rect verify occurs (see Figure 7). During program-

ming and verify operation, a MARGIN MODE

circuit is automatically activated in order to guar-

antee that each cell is programmed with enough

margin. No overprogram pulse is applied since the

verify in MARGIN MODE at VCC much higher than

3.6V provides necessary margin to each pro-

grammed cell.

Program Inhibit

Programming of multiple M27W256s in parallel

with different data is also easily accomplished. Ex-

cept for E, all like inputs including G of the parallel

M27W256 may be common. A TTL low level pulse

applied to a M27W256’s E input, with VPP at 12.75

V, will program that M27W256. A high level E input

inhibits the other M27W256s from being pro-

grammed.

Program Verify

A verify (read) should be performed on the pro-

grammed bits to determine that they were correct-

ly programmed. The verify is accomplished with G

at VIL, E at VIH, VPP at 12.75V and VCC at 6.25V.

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