AK4394 データシートの表示（PDF） - Asahi Kasei Microdevices
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AK4394 Datasheet PDF : 26 Pages
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ASAHI KASEI
[AK4394]
DC CHARACTERISTICS
(Ta = 25°C; AVDD, DVDD = 4.75~5.25V)
Parameter
Symbol
min
typ
High-Level Input Voltage
Low-Level Input Voltage
VIH
2.2
-
VIL
-
-
High-Level Output Voltage (Iout = -100mA) VOH DVDD-0.5
-
Low-Level Output Voltage (Iout = 100mA)
VOL
-
-
Input Leakage Current
(Note 17)
Iin
-
-
Note: 17. DFS0, P/S pins have internal pull-down or pull-up devices, nominally 100kW.
max
Units
-
V
0.8
V
-
V
0.5
V
± 10
µA
SWITCHING CHARACTERISTICS
(Ta = 25°C; AVDD, DVDD = 4.75~5.25V; CL = 20pF)
Parameter
Symbol
min
typ
max
Units
Master Clock Timing
Frequency
Duty Cycle
fCLK
7.7
dCLK
40
41.472
60
MHz
%
LRCK Frequency
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Duty Cycle
Serial Interface Timing
BICK Period
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
BICK Pulse Width Low
Pulse Width High
BICK “” to LRCK Edge
LRCK Edge to BICK “”
SDATA Hold Time
SDATA Setup Time
Control Interface Timing
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN High Time
CSN “¯” to CCLK “”
CCLK “” to CSN “”
(Note 18)
(Note 19)
(Note 19)
fsn
30
fsd
60
fsq
120
Duty
45
tBCK
tBCK
tBCK
tBCKL
tBCKH
tBLR
tLRB
tSDH
tSDS
1/128fs
1/64fs
1/64fs
30
30
20
20
20
20
tCCK
200
tCCKL
80
tCCKH
80
tCDS
50
tCDH
50
tCSW
150
tCSS
50
tCSH
50
54
kHz
108
kHz
216
kHz
55
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Reset Timing
PDN Pulse Width
(Note 20)
tPD
150
ns
Notes: 18. When the normal/double/quad speed modes are switched, AK4394 should be reset by PDN pin or RSTN bit.
19. BICK rising edge must not occur at the same time as LRCK edge.
20. The AK4394 can be reset by bringing PDN “L” to “H”.
When the states of CKS2-0 or DFS1-0 change, the AK4394 should be reset by PDN pin or RSTN bit.
M0081-E-00
-8-
1999/11
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