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PDM41257SA10SO データシートの表示(PDF) - Paradigm Technology

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PDM41257SA10SO
Paradigm-Technology
Paradigm Technology Paradigm-Technology
PDM41257SA10SO Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Features
n High-speed access times
Com’l: 7, 8, 10, 12 and 15 ns
Industrial: 8, 10, 12 and 15 ns
n Low power operation (typical)
- PDM41257SA
Active: 400 mW
Standby: 150 mW
- PDM41257LA
Active: 350 mW
Standby: 25 mW
n Single +5V (±10%) power supply
n TTL compatible inputs and outputs
n Packages
Plastic SOJ (300 mil) - SO
PDM41257
256K Static RAM
256K x 1-Bit
1
Description
2 The PDM41257 is a high-performance CMOS static
RAM organized as 262,144 x 1 bit. Writing to this
device is accomplished when the write enable (WE)
and the chip enable (CE) inputs are both LOW.
3 Reading is accomplished when WE remains HIGH
and CE goes LOW.
The PDM41257 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
4 compatible. The PDM41257 comes in two versions,
the standard power version PDM41257SA and a low
power version the PDM41257LA. The two versions
are functionally the same and only differ in their
5 power consumption.
The PDM41257 is available in a 24-pin 300-mil
plastic SOJ for surface mount applications.
6
Functional Block Diagram
7
A0
Addresses
A17
DIN
CE
WE
Decoder
Memory
Matrix
•••••
Column I/O
DOUT
8
9
10
11
12
Rev. 2.2 - 4/27/98
1

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