PDM41256SA10TI データシートの表示（PDF） - Paradigm Technology

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PDM41256SA10TI

256K static RAM 32K x 8-bit

Paradigm Technology 

PDM41256

Low VCC Data Retention Waveform

Data Retention Mode

1

V CC

4.5V

4.5V

VDR

t CDR

tR

2

VIH

CE VIL

VDR

3

DON'T CARE

4

5

Data Retention Electrical Characteristics (LA Version Only)

Symbol Parameter

VDR

ICCDR

VCC for Retention Data

Data Retention Current

tCDR

tR(4)

Chip Deselect to Data Retention Time

Operation Recovery Time

Test Conditions

Min.

2

Typ.

—

Max. Unit

—

V

6

CE ≥ VCC – 0.2V

VIN ≥ VCC – 0.2V

or ≤ 0.2V

VCC = 2V

—

95

500 µA

VCC = 3V

—

0

350

—

750 µA

—

ns

7

tRC

—

—

ns

NOTES: (For three previous Electrical Characteristics tables)

1. The device is continuously selected. Chip Enable is held in its active state.

8

2. The address is valid prior to or coincident with the latest occuring Chip Enable.

3. At any given temperature and voltage condition, tHZCE is less than tLZCE.

4. This parameter is sampled.

9 5. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured ±200 mV from steady state voltage

6. Vcc = 5V ± 5%.

10

11

12

Rev. 4.4 - 4/29/98

7

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