AM24LC04 データシートの表示（PDF） - Anachip Corporation

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AM24LC04

2-Wire Serial 4K-Bit (512 x 8) CMOS Electrically Erasable PROM

Anachip Corporation 

2-Wire Serial 4K-Bit (512 x 8) CMOS Electrically Erasable PROM

ATC

AM24LC04

Write Operations (Continued)

Write Protection

Programming will not take place if the WP pin of the

AM24LC04 is connected to Vcc. The AM24LC04 will

accept slave and byte addresses. But if the memory

accessed is write protected by the WP pin, the

AM24LC04 will not generate an acknowledge after

the first byte of data has been received, and thus the

programming cycle will not be started when the stop

condition is asserted.

Read Operations

Read operations are initiated in the same way as

write operations with the exception that the R/W bit

of the slave address is set to one. There are three

basic types of read operations: current address read,

random read, and sequential read.

Current Address Read

The AM24LC04 contains an address counter that

maintains the address of the last accessed word,

internally incremented by one. Therefore if the

previous access (either a read or write operation )

was to address n, the next current address read

operation would access data from address n + 1.

Upon receipt of the slave address with R/W bit set to

one, the AM24LC04 issues an acknowledge and

transmits the eight bit data word. The master will not

acknowledge the transfer but does generate a stop

condition and the AM24LC04 discontinues

transmission. (Shown in Figure 6)

Random Read

Random read operations allow the master to access

any memory location in a random manner. To

perform this type of read operation, first the word

address must be set. This is done by sending the

word address to the AM24LC04 as part of a write

operation. After the word address is sent, the master

generates a start condition following the

acknowledge. This terminates the write operation,

but not before the internal address pointer is set.

Then the master issues the control byte again but

with R/W bit set to a one. The AM24LC04 will then

issue an acknowledge and transmit the eight bit data

word. The master will not acknowledge the transfer

but does generate a stop condition and the

AM24LC04 discontinues transmission. (Shown in

Figure 7)

Sequential Read

Sequential reads are initiated by either a current

address read or a random read. After the master

receives a data word, it responds with an

acknowledge. As long as the E2PROM receives an

acknowledge, it will continue to increment the data

words. When the memory address limit is reached,

the data word address will “roll over” and the

sequential read will continue. The sequential read

operation is terminated when the master does not

respond with a zero but does generate a following

stop condition.

Anachip Corp.

www.anachip.com.tw

Rev. A2 Oct 20, 2003

6/12

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