AM29F800T-150FEB データシートの表示（PDF） - Advanced Micro Devices

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AM29F800T-150FEB

8 Megabit (1,048,576 x 8-Bit/524,288 x 16-Bit) CMOS 5.0 Volt-only, Sector Erase Flash Memory

Advanced Micro Devices 

PRELIMINARY

of the device is similar to reading from 12.0 Volt Flash

or EPROM devices.

The Am29F800 is programmed by executing the pro-

gram command sequence. This will invoke the Embed-

ded Program Algorithm which is an internal algorithm

that automatically times the program pulse widths and

verifies proper cell margin. Erase is accomplished by

executing the erase command sequence. This

will invoke the Embedded Erase Algorithm which is an

internal algorithm that automatically preprograms the

array if it is not already programmed before executing

the erase operation. During erase, the device automat-

ically times the erase pulse widths and verifies proper

cell margin.

This device also features a sector erase architecture.

This allows for sectors of memory to be erased and re-

programmed without affecting the data contents of

other sectors. A sector is typically erased and verified

within 1.5 seconds. The Am29F800 is erased when

shipped from the factory.

The Am29F800 device also features hardware sector

protection. This feature will disable both program and

erase operations in any combination of nineteen sec-

tors of memory.

AMD has implemented an Erase Suspend feature that

enables the user to put erase on hold for any period of

time to read data from or program data to a sector that

was not being erased. Thus, true background erase

can be achieved.

The device features single 5.0 Volt power supply oper-

ation for both read and write functions. Internally

generated and regulated voltages are provided for the

program and erase operations. A low VCC detector au-

tomatically inhibits write operations during power tran-

sitions. The end of program or erase is detected by the

RY/BY pin. Data Polling of DQ7, or by the Toggle Bit

(DQ6). Once the end of a program or erase cycle has

been completed, the device automatically resets to the

read mode.

The Am29F800 also has a hardware RESET pin.

When this pin is driven low, execution of any Embed-

ded Program Algorithm or Embedded Erase Algorithm

will be terminated. The internal state machine will then

be reset into the read mode. The RESET pin may be

tied to the system reset circuitry. Therefore, if a system

reset occurs during the Embedded Program Algorithm

or Embedded Erase Algorithm, the device will be auto-

matically reset to the read mode and will have errone-

ous data stored in the address locations being

operated on. These locations will need re-writing after

the Reset. Resetting the device will enable the sys-

tem’s microprocessor to read the boot-up firmware

from the Flash memory.

AMD’s Flash technology combines years of Flash

memory manufacturing experience to produce the

highest levels of quality, reliability and cost effective-

ness. The Am29F800 memory electrically erases all

bits within a sector simultaneously via Fowler-Nor-

dhiem tunneling. The bytes/words are programmed

one byte/word at a time using the EPROM program-

ming mechanism of hot electron injection.

2

Am29F800T/Am29F800B

8/18/97

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