AM29LV008T-120FC データシートの表示（PDF） - Advanced Micro Devices

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AM29LV008T-120FC

8 Megabit (1,048,576 x 8-Bit) CMOS 3.0 Volt-only, Sectored Flash Memory

Advanced Micro Devices 

PRELIMINARY

90 ns access time, optimizing performance in systems

where the power supply is in the regulated range of 3.0

to 3.6 volts. To eliminate bus contention, the device has

separate chip enable (CE), write enable (WE), and

output enable (OE) controls.

The Am29LV008 is entirely command set-compatible

with the JEDEC single-power-supply Flash standard.

Commands are written to the command register using

standard microprocessor write timings. Register con-

tents serve as input to an internal state-machine that

controls the erase and programming circuitry. Write cy-

cles also internally latch addresses and data needed

for the programming and erase operations. Reading

data out of the device is similar to reading from other

Flash or EPROM devices.

The Am29LV008 is programmed by executing the pro-

gram command sequence. This invokes the Embedded

Program Algorithm, which is an internal algorithm that

automatically times the program pulse widths and veri-

fies proper cell margin. The device is erased by execut-

ing the erase command sequence. This invokes the

Embedded Erase Algorithm, which is an internal algo-

rithm that automatically preprograms the array, if it is

not already programmed, before executing the erase

operation. During erase, the device automatically times

the erase pulse widths and verifies proper cell margin.

This device also features a sector erase architecture.

This allows for sectors of memory to be erased and re-

programmed without affecting the data contents of

other sectors. A sector is typically erased and verified

within 1.0 second. The Am29LV008 is fully erased

when shipped from the factory.

The Am29LV008 device also features hardware sector

protection, implemented via external programming

equipment, which disables both program and erase op-

erations in any combination of the memory sectors.

The Erase Suspend feature enables the user to pause

the erase operation, for any period of time, to read data

from or program data to a sector that was not being

erased. Thus, true background erase can be achieved.

The device features 3.0 volt, single-power-supply oper-

ation for both read and write functions. Internally gen-

erated and regulated voltages are provided for the

program and erase operations. A low VCC detector au-

tomatically inhibits write operations during power tran-

sitions. The end of program or erase is detected by the

RY/BY pin. Data Polling of DQ7, or by the Toggle Bit

(DQ6). Once the end of a program or erase cycle has

been completed, the device automatically resets to the

read mode.

The Am29LV008 also has a hardware RESET pin.

When this pin is driven low, execution of any Embed-

ded Program or Erase Algorithm will be terminated.

The internal state machine is then be reset into the

read mode. Resetting the device will enable the sys-

tem’s microprocessor to read the boot-up firmware

from the Flash memory.

AMD’s Flash technology combines years of Flash

memory manufacturing experience to produce the

highest levels of quality, reliability and cost effective-

ness. The Am29LV008 memory electrically erases

all bits within a sector simultaneously via Fowler-

Nordheim tunneling. The bytes are programmed one

byte at a time using the EPROM programming mecha-

nism of hot electron injection.

2

Am29LV008T/Am29LV008B

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