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AM79C988 データシートの表示(PDF) - Advanced Micro Devices

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AM79C988
AMD
Advanced Micro Devices AMD
AM79C988 Datasheet PDF : 25 Pages
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PRELIMINARY
PIN DESCRIPTION
Analog
PDO0-3
Pseudo AUI Data Output
Input
Single-ended receiver. Data input from the IMR2 device.
PDI0-3
Pseudo AUI Data Input
Output
Single-ended output driver. Data output to the
IMR2 device.
PCI0-3
Pseudo AUI Collision Input
Output
Single-ended output driver. Collision output to the
IMR2 device.
TXD+0-3, TXD-0-3
Transmit Data
Output
10BASE-T port differential drivers.
RXD+0-3, RXD-0-3
Receive Data
Input
10BASE-T port differential receivers.
REXT
External Resistor
Input
REXT must be tied to AVDD through a 13 kΩ ±1%
resistor.This provides the current reference for all inter-
nal analog functions.
AVDD
Analog Power
Power Pin
These pins supply +5-V power to the analog portion of
the device. These pins should be decoupled and kept
separate from the digital power plane.
AVSS
Analog Ground
Ground Pin
These pins provide the ground reference for the analog
portions of the QuIET circuitry.
Digital
SDATA
Serial Data
Input/Output
Transfers command and status data between the
QuIET device and the IMR2 chip.
DIR
Direction
Input
Selects the direction of command data and status data
transfer between the QuIET device and the IMR2 chip.
RST
Reset
Input, Active Low
Resets the internal registers of the QuIET device.
CLK
Clock
Input
20-Mhz clock signal. The clock signal should be the
same one that is used by all IMR2 devices connected
to the QuIET chip.
TEST
Input, Active High
Reserved for factory use only. This pin does have an
internal pull-down, but should be tied LOW for
normal operation.
DVDD
Digital Power
Power Pin
These pins supply +5-V power to the digital portion of
the device. These pins should be decoupled and kept
separate from the analog power plane.
DVSS
Digital Ground
Ground Pin
These pins provide the ground reference for the digital
portions of the QuIET circuitry.
Note: All digital I/O pins are CMOS and TTL compatible.
Am79C988A
7

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