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AN209 データシートの表示(PDF) - Unspecified

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AN209 Datasheet PDF : 14 Pages
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AN 209: Using Terminator Technology in Stratix & Stratix GX Devices
How Terminator
Technology
Works
Series
Termination
Resistor (RS)
Two external precision resistors (RUP and RDN) per VCCIO bank are used
as reference resistors. RUP is a pull-up resistor connected to VCCIO; RDN is
a pull-down resistor connected to GND. Terminator technology monitors
the value of the two reference resistors and uses the value to adjust
internal termination circuitry to the same impedance. In addition,
Terminator technology circuitry compensates for voltage, temperature,
and process variation. This circuitry continuously calibrates the internal
termination resistors during normal device operation.
Terminator technology supports one type of I/O standard per I/O bank.
You can enable or disable on-chip termination within an I/O bank on a
pin-by-pin basis. To use different on-chip termination I/O standards on a
device, select separate I/O banks. For example, if you want to use on-chip
termination for GTL+ (3.3-V VCCIO) and SSTL-3 class II (3.3-V VCCIO), use
two separate I/O banks.
Different I/O standards need different VCCIO and VREF voltages. You can
simultaneously use some I/O standards with the same VCCIO in an I/O
bank. For more information, refer to AN 201: Using Selectable I/O Standards
in Stratix Devices.
Terminator technology provides an on-chip series termination resistor
(RS) for single-ended voltage-referenced I/O standard such as SSTL-2 and
SSTL-3. The series termination value for these I/O standards is 25 ; the
impedance matching value for these I/O standards is either 25 or 50 . All
I/O pins in Stratix and Stratix GX devices support this termination
method. Table 1 shows the I/O standards supported for series
termination and impedance matching.
Table 1. Supported I/O Standards for Series Termination & Impedance Matching
Feature
Series Termination
Impedance Matching
Supported I/O Standards
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVTTL/LVCMOS
LVTTL/LVCMOS
LVTTL/LVCMOS
VCCIO (V)
3.3
3.3
2.5
2.5
3.3
2.5
1.8
2
Altera Corporation

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