AN2104 データシートの表示（PDF） - Freescale Semiconductor

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AN2104

Using Background Debug Mode for the M68HC12 Family

Freescale Semiconductor 

Freescale Semiconductor, Inc.

Application Note

Theory of Operation

BKGD 1

NC 3

VFP 5

2 GND

4 RESET

6 VDD

Figure 2. BDM Tool Connector

To communicate with the BDM on the part, two pins are used: BKGD and

GND. This method of serial interface is used to both send and receive

data. A special communications protocol is used that resynchronizes at

the beginning of each bit. By doing this, a greater frequency tolerance

for synchronization is allowed.

All bits are started with a falling edge signal that is initiated by the

external host. After the MCU sees this falling edge, it waits nine E-clock

cycles and then samples the level on the BKGD pin. The data is

transferred MSB (most significant bit) first at the rate of 16 E-clock cycles

per bit. The E-clock is defined as the SYSCLK divided by two.

The two types of BDM commands are:

• Hardware

• Firmware

When using hardware commands, the BDM is enabled, but not active,

and the user’s code is running. See Table 1. These commands allow all

internal and external memory, which is accessible to the microcontroller,

to be read or written. This also includes on-chip I/O (input/output) and

control registers.

The control logic watches the bus for any free bus cycles that it can use

to execute the hardware command. By using the free bus cycles, the

CPU is not disturbed. If, however, a free cycle is not found within a

specified time, it will use a bus cycle, which temporarily freezes the CPU.

AN2104

3

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