AN727 データシートの表示（PDF） - Vishay Semiconductors

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AN727

High-Frequency, High-Efficiency Buck Converter Design For Multi-Cell Battery Configured Systems Using Si9167

Vishay Semiconductors 

AN727

Vishay Siliconix

Where

VINMAX = Maximum input voltage (V)

VOUT = Output Voltage (V)

VDSQP = Voltage drop across the main switch (V)

DI = Max ripple current allowed for acceptable ripple (A)

dMIN= Duty ratio at VINMAX.

VR_DROP = Resistive drop through inductor and PCB traces (V)

IOUT = Rated output current (A)

RL = Equivalent Series Resistance (W)

RTRACE = Combined resistance of positive and negative output

traces (W)

Fsw = Oscillator Frequency (Hz)

Refer to Figure 7 when deciding the inductance and frequency.

The frequency VS inductance plot assumes a 10-mF ceramic

multilayer chip capacitor with a 20-mW maximum ESR and

10-mVp-p output ripple.

FSW vs. Inductance

16

14

12

10

8

6

4

2

0

300 500 700 900 1100 1300 1500 1700 1900

Fsw (kHz)

FIGURE 7. Inductor Value Selection for 10-mF Ceramic

Output Capacitor

Output Voltage

The divider resistor pair, R5 and R6 in Figure 1 determine the

output regulation point. Since R5 is part of the compensation

network, it is strongly recommended that R6 be adjusted in

order to change the regulation voltage without affecting the

loop gain. With fixed R5, R6 can be easily calculated by (3) for

the desired output voltage setting.

R6

+

R5

VOUT

VREF

*

1

(3)

The typical value for VREF is 1.3 V.

Power_Good Comparator

The inverting input is internally connected to the reference

voltage of 1.3 V (see functional block diagram, Figure 2). This

uncommitted comparator, with about 50 mV hysteresis, is

intended to be used to sense the output voltage and raise a

high flag once the output voltage Vout reaches its regulation

limit. The 50-mV hysteresis at the comparator input is provided

while output is transitional from high to low. The output is

capable of sourcing 2 mA and sinking 1 mA current. The source

current can be increased up to 1 mA by pulling the output high

with an external resistor (Figure 1). Use following equation for

the POK to switch to high at a VOL and to low at

[VOL – VHYSTERESIS].

VOL + 1.3

(R7 ) R8)

R8

Volts

(4)

VHYSTERESIS + 50

(R7 ) R8)

R8

mVolts

VIN

(VOL – VHYSTERESIS)

(VOL)

FIGURE 8. VOUT (V)

Synchronization

Systems using more than one converter for power

management functions often face EMC problems. The

reflected ripple at the inputs from these independent

converters, which operate at different frequencies and phases,

can create a wide frequency range of harmonics. Obviously, it

is difficult, if not impossible, to eliminate all of these from the

emission spectrum. The alternatives are to incorporate a

heavy filter at the input of each converter or let all converters

oscillate at the same frequency and phase.

Document Number: 70959

07-Jul-99

www.vishay.com S FaxBack 408-970-5600

5

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