AN701 データシートの表示（PDF） - Vishay Semiconductors
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AN701
Vishay Semiconductors
AN701 Datasheet PDF : 19 Pages
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AN701
Vishay Siliconix
PIN 11 & PIN 14 -VIN & VDD
These pins are used for powering the Si9114A and should
consequently be well de-coupled. In selecting the right
de-coupling, the MOSFET gate drive requirements should be
considered, as the de-coupling capacitor will also have to
supply the required peak current. Generally speaking, the best
combination would be a 1- to 10-mF electrolytic for bulk energy
and a 100-nF ceramic for high-frequency bypass. The VCC rail
should be carefully observed at the switch on and off
occurrences using ac de-coupling, and the peak voltage
spikes should be measured. These should be less than
200 mV. Excessive noise on the VCC will appear on other pins
and may cause instability or jitter on the control waveforms.
PIN 12 Ć OUTPUT DRIVER
The output driver uses complementary n- and p-channel
output stages, with break-before-make capability, preventing
shoot-through conduction. The output is typically capable of
sourcing 400 mA and sinking 700 mA. When driving power
MOSFETs, remember that the relevant parameter for sizing
the drive requirements is the total gate charge for the applied
voltage, not the commonly used input capacitance, CISS.
When driving a MOSFET in common source mode, the Miller
effect will significantly affect the drive waveform applied to the
gate: in particular, when the driving source impedance is high
enough (Figure 10).
As the voltage is applied to the gate, the previously charged
Cgd will need to discharge, and will thus oppose the application
of any voltage to Vgs. Many designers commonly overestimate
the drive requirements of the MOSFET and cause excessive
noise in the converter by overdriving the MOSFET. To prevent
this, designs typically require snubbers or other additional
noise attenuation devices. The voltage that will be applied to
the drain just prior to driving of the gate will need to be
Drain
considered. In practice, most manufacturers are unable to
publish this data for all voltages, so designers should use the
curve nearest to the actual voltage applied.
The Si9420DY LITTLE FOOT MOSFET is designed
specifically for converters in the 5- to 25-W power range. It has
a 200-V VDS rating with 1-W rDS(on). Using the Gate charge
curve, for a gate drive of 12 V from the Si9114A, the total gate
charge for 100-V VDS will be 10 nC. From Q = i x t, it is easy
to deduce that with 400 mA gate drive, a time of 50 ns will be
obtained—which is more than adequate for this size MOSFET.
To supply 400 mA, the gate drive circuit resistor will need to be
12 V/400 mA = 30 WĄ (Figure 11).
PIN 13 Ć CURRENT SENSE
The current sense comparator performs the current mode
control function by comparing the output of the error amplifier
(VC) with the current in the output inductor.
It is impractical to measure the output inductor current, but the
rising slope of the current can supply all the necessary
information if sampled in the MOSFET as a scaled equivalent.
Certain precautions are necessary, however, due to data
distortion, noise, and the rarity of ideal operating conditions.
Sensed current waveforms often have leading-edge spikes or
noise caused by reverse recovery of rectifiers, equivalent
capacitive loading on the secondary, and inductive circuit
effects. Inductive sense resistors must not be used, as they
cause large damaging spikes and distort the sensed
waveforms. These spikes can confuse the PWM comparator
into believing that an overload condition is present. In addition,
the Si9114A uses a single pin (–Vin) for all the return current
requirements, including the output driver. As a result, the
current pulse from the gate charge transfer into the MOSFET
will appear on the sense pin and be filtered out.
20
VDS = 100 V
16
Drive
Cgd
Rgate
Cgs
12
CDS
8
4
www.vishay.com
6
Source
Figure 10
0
0
4
8
12
16
Total Gate Charge (Qg)
Figure 11 Si9420DY Gate Charge
Document Number: 70575
16-Jan-01
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