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AN708 データシートの表示(PDF) - Vishay Semiconductors

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AN708 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
AN708
Vishay Siliconix
a)
Short Circuit On 5 V Output
Q1 Drain Voltage (100 V/Div)
Voltage On U1, Pin 4 (Current Sense)
(0.5 V/Div)
NOTE: 0.8 V dc pedestal caused by
the foldback circuit.
b)
Q1 Drain Voltage (100 V/Div)
Q1 Gate Voltage (100 V/Div)
c)
Q1 Gate Drive (5 V/Div)
Voltage On U1, Pin 4 (Current Sense)
(0.5 V/Div)
FIGURE 2. Operating Waveforms (all photos full load, VIN = 150 V dc)
Measured efficiency at VIN = 300 VDC was 73.4%.
During testing, an input capacitor value of as little as 33 mF
proved adequate versus the design value of 68 mF. The
low-value capacitor produces an input ripple voltage of 30 V
pk-pk. Since the primary inductance is slightly lower than the
design maximum value, the circuit is still able to maintain
regulation with the higher input ripple voltage value. This is a
Document Number: 70581
good example of where trade-offs can be made during
development programs. By using the larger input capacitance
and primary inductance, the peak input current could be
reduced slightly, and a slight improvement in efficiency should
result. However, a larger input capacitance will decrease the
conduction angle of the input rectifiers, and consequently will
reduce the input power factor. The priorities of a particular
application will determine the optimal approach.
www.vishay.com S FaxBack 408-970-5600
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