AN725 データシートの表示（PDF） - Silicon Laboratories

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AN725

ADVANCED LOW POWER TECHNIQUES FOR SiM3L1XX DEVICES

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AN725

5.3.3. Dynamic Charge Pump Drive Impedance

The low power mode charge pump supports four drive impedance settings. For applications requiring aggressive

PM8 current reduction, these settings can be adjusted dynamically to minimize the total low power mode current

consumed. This adjustment could be performed by measuring the charge pump load current as described in

Section 5.3.2 before each entry into PM8 and setting the appropriate drive impedance. However, a faster and

simpler method is available.

The charge pump dynamic scaling method consists of two parts:

1. Determine when the drive impedance should be decreased by using the charge pump voltage monitor.

Each time the monitor trips, firmware should reduce the drive impedance setting. If the setting is already at

its minimum, firmware can place the charge pump in bypass mode or disable active PM8 circuitry.

2. Determine when the drive impedance can be increased. On a regular but relatively infrequent basis,

firmware can determine if the CPLOAD setting can be decreased by one without causing the charge pump

output to fall below 0.95 V as described in this section.

The output state of the charge pump in PM8 is given by Equation 1. The required state of the charge pump if

CPLOAD is reduced by 1 is given by:

V-----B----A-----T--

2

–

ILOAD



RCPLOAD

–

1



0.95

V

Equation 3. Charge Pump Output Voltage at an Increased Impedance

In Equation 3, the RCPLOAD-1 term is the drive impedance for CPLOAD-1. Putting these equations together and

solving for ILOAD gives:

VCP



V-----B--2--A-----T--  1

–

R----R-C----CP---LP---O-L---OA----DA---D-–----1-

+

0.95

V





R----R-C----CP---LP---O-L---OA----DA---D-–----1-

Equation 4. Minimum Charge Pump Output Voltage to Increase Drive Impedance

Equation 4 provides the minimum VCP value for the present CPLOAD setting that allows CPLOAD to be reduced

by 1 without the output dropping below 0.95 V. Using this equation, the CMP0 DAC setting that corresponds to this

equation can be written as:

DAC

=

ceili

ng32





1

–

R----R-C----CP---LP---O-L---OA----DA---D-–----1-

+

6----4----------0---.-9----5-----V--

VBAT





R----R-C----CP---LP---O-L---OA----DA---D-–----1-





Equation 5. CMP0 DAC Setting for Minimum Charge Pump Output Voltage to Increase Drive Impedance

On a regular basis, firmware can perform the following steps:

1. Use the SARADC0 module to measure VBAT.

2. Set the CMP0 DAC to the value determined by Equation 5.

3. Configure CMP0 to wake and interrupt the device if the charge pump output voltage is less than the CMP0

DAC.

4. Schedule an RTC0 alarm to wake and interrupt the device in 1 ms.

5. Enter PM8 and wait for a wakeup event.

6. If the wakeup event was the comparator, CPLOAD should not be reduced by 1. Otherwise, CPLOAD can

be reduced by 1.

Equation 4 includes some safety margins that might not be immediately obvious, since it assumes that the charge

pump load current is independent of the charge pump output voltage. In fact, the PM8 circuitry requires less current

as its supply lowers. Since reducing CPLOAD by 1 will decrease the charge pump output voltage, the resulting

output voltage should always be greater than 0.95 V, assuming Equation 4 is satisfied.

20

Rev. 0.1

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