AN725 データシートの表示（PDF） - Silicon Laboratories

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AN725

ADVANCED LOW POWER TECHNIQUES FOR SiM3L1XX DEVICES

Silicon Laboratories 

AN725

4. Reducing Active Mode Power Consumption

In active mode, the core is fetching instructions from memory and executing those instructions, and a large number

of peripherals may be active at once. This section discusses ways to reduce the SiM3L1xx device power

consumption in active mode (Normal, PM1, PM4, or PM5).

4.1. Dynamic AHB/APB Clock Scaling

One of the easiest ways to reduce overall system power consumption is to reduce the active mode time, which

maximizes the amount of time spent in the low power mode.

If the longest path to the next low power mode is the execution of code (e.g., a math algorithm), then it is typically

beneficial to run the AHB clock at the fastest speed possible to reduce the time spent in active mode.

If the longest path to the next low power mode is the transfer or collection of data through a peripheral, it is best to

run the clock at the lowest speed required for the peripheral. For example, if using the UART at 115200 baud and

the core is waiting for data to finish transferring, then running the AHB and APB at the slowest clock to achieve

115200 baud may be the lowest power configuration. However, if data is being transferred memory to memory by

the DMA, running the clocks at the fastest speed possible yields the lowest power consumption.

Due to the clock system of the SiM3L1xx devices, the AHB and APB clocks can be dynamically changed quickly

and easily using the CLKCTRL module based on the needs of the application.

4.2. Using the DMA and DTM Modules

The Direct Memory Access (DMA) and Data Transfer Manager (DTM) modules help move data without core

intervention. This reduces overall power consumption by removing the power consumed during flash accesses.

Additionally, since the Cortex-M3 is a load-store architecture where data is loaded into and out of registers only,

multiple instructions are required to move data from one area of memory to another, so the DMA and DTM may be

faster than data moves by the core, depending on the AHB load.

Instead of performing the data moves, the core can either sleep using wait-for-interrupt (WFI) or wait-for-event

(WFE) instructions, or the core can perform other tasks in parallel, reducing the active mode time.

For more information on how to use the DMA and DTM modules, see “AN666:Usage Guide for e

SiM3U1xx,SiM3C1xx, and SiM3L1xx DMA and DTM Modules” on the Silicon Labs 32-bit application notes website:

www.silabs.com/32bit-appnotes.

4.3. Code Optimization

There are several different coding techniques, compiler, and library options available for the Precision32 devices.

These options will change both code size and execution speed, which may result in power consumption savings in

systems which aim to execute code in active mode as quickly as possible before entering a low power state. In

addition to getting to the low power mode more quickly, changing the project settings may lead to smaller code

footprints, compacting the code into a smaller area with fewer memory accesses. The power consumption benefits

of code optimization for speed or size will vary depending on the project requirements and code.

For more information on how to write efficient code and the various optimization settings, see”AN720:

Precision32™ Optimization Considerations for Code Size and Speed” on the Silicon Labs 32-bit application notes

website: www.silabs.com/32bit-appnotes.

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