AN8014 データシートの表示（PDF） - Panasonic Corporation

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AN8014

Step-down, step-up, or inverting DC-DC converter control IC

Panasonic Corporation 

AN8014S

Voltage regulators

s Terminal Equivalent Circuits (continued)

Pin No. I / O

Equivalent circuit

5



VREF

ICHG

U.V.L.O.

output

Latch

S

R

Q

0.75 V

6

I

VREF

5 S.C.P.

Description

S.C.P.:

Connection for the capacitor that sets the

soft start period and the timer latch short-

circuit protection circuit time constant.

Use a capacitor with a value of 1 000 pF

or higher.

The charge current ICHG is decided by the

timing resistor RT which controls sample

to sample variations and temperature varia-

tions.

It is approx. −2.3 µA when RT = 15 kΩ.

ICHG

=

VRT

RT

×

1

11

[A]

IN+:

Noninverting input to the error amplifier.

Use the common-mode input in the range

− 0.1 V to +0.8 V.

7

I

8

O

7

IN−

VREF

9



10

I

VCC

0.1 V

50 µA

6

IN+

Source current

8 FB

Sink current



10 CLM

50 µA

CLM

comp.

IN−:

Inverting input to the error amplifier.

Use the common-mode input in the range

− 0.1 V to +0.8 V.

FB:

Output from the error amplifier.

The source current is approx. −110 µA and

sink current is approx. 8 mA.

Correct the frequency characteristics of

the gain and the phase by connecting a re-

sistor and a capacitor between this pin

and IN− pin.

N.C.: Not connected.

CLM:

Detects the overcurrent state in switching

transistor.

Insert a resistor with a low resistance between

this pin and VCC to detect overcurrent states.

When this pin falls to a level 95 mV or

more lower than VCC , the PWM output is

turned off for that period thus narrowing

the width of the on-period.

(This implements a pulse-by-pulse

overcurrent protection technique.)

6

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